oshug-announce

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OSHUG 64 — Intel® Movidius™ Neural Compute Stick Workshop, Thursday 22nd February.
by Andrew Back 03 Jan '18

03 Jan '18

Hello, Registration is now open for the first workshop of 2018, which will provide hands-on experience with using the Intel Movidius Neural Compute Stick and open source frameworks to deploy deep neural networks. Details of which and a link to registration can be found below. Regards, Andrew // OSHUG #64 — Intel® Movidius™ Neural Compute Stick Workshop. On the 22 February 2018, 09:00 - 17:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. http://oshug.org/event/64 Learn how to use the Intel® Movidius™ Neural Compute Stick and open source frameworks to deploy deep neural networks at the edge. — Workshop details Market research estimates there will be as many as 20 billion connected devices in the market by 2020. These devices are expected to generate billions of petabytes of data traffic between cloud and edge devices. In 2017 alone, 8.4B connected devices are expected in the market which is sparking a strong need to pre-process data at the edge. This has led many IoT device manufacturers, especially those working on vision based devices like smart cameras, drones, robots, AR/VR, etc., to bring intelligence to the edge. Through the recent addition of the Movidius™ VPU technology to its existing AI edge solutions portfolio, Intel is well positioned to provide solutions that help developers and data scientists pioneer the low-power intelligent edge devices segment. This workshop will provide hands-on experience with Intel’s Neural Compute Stick – a low-cost, form-factor developer kit for low-power vision based embedded inference applications. What You Will Learn: * Insights into how Movidius™ VPUs are pioneering DNN accelerated vision processing. * Introduction to hardware and software components of NCS. * Workflow of network profiling and application development using NCS. * Detection/Classification models * Advanced functionalities * Hands-on with advanced demos and sample codes built using NC SDK’s API framework, which includes support for Caffe and TensorFlow — Participant requirements ** Participants are required to bring a laptop computer with Ubuntu 16.04 and Neural Compute SDK installed ** https://github.com/movidius/ncsdk — What is provided * NCS hardware will be provided for use during the workshop * A light lunch will be provided and please ensure that any dietary requirements are made clear during registration — Hosted by The workshop will be hosted by Intel engineers. This workshop is free to attend and hosted by Intel in partnership with the BCS Open Source Specialist Group and the Open Source Hardware User Group. * Sponsored by DesignSpark — https://www.rs-online.com/designspark/home Note: Please aim to arrive by 08:45 as the workshop will start at 09:00 prompt. // -- Andrew Back http://abopen.com

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OSHUG 63 — Collaborative music making, ultra-low latency audio and sensor processing.
by Andrew Back 21 Dec '17

21 Dec '17

Hello, Details can be found below for the 63rdm, and first meeting of 2018, the theme for which is open source musical software and hardware. Regards, Andrew // Event #63 — Collaborative music making, ultra-low latency audio and sensor processing. On the 18 January 2018, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. http://oshug.org/event/63 We start the new year with an event on the theme of open source musical software and hardware. — Bela, an embedded platform for ultra-low latency audio and sensor processing Bela started off as a research project at Centre For Digital Music (Queen Mary University of London) and is now a commercial product, mainly aimed at makers, programmers and researchers that work with audio. The platform is based on a BeagleBone Black with a custom expansion cape and a dedicated software environment. The board runs Debian Linux with Xenomai as a real-time co-kernel. The combined use of Xenomai and the BeagleBone Black's on-board PRU microcontroller allows to achieve sub-millisecond latency for audio and sensor processing, while node.js is used to provide a user-friendly web-based IDE. The project is entirely open source, hardware and software. * Giulio Moro is a PhD student in the Centre for Digital Music at Queen Mary University of London. A sound engineer by training, he is now researching in the field of performer-instrument interaction. He is one of the inventors and core developers of Bela. — Female Laptop Orchestra: exploring geographical, cultural, technical and artistic challenges of collaborative music making As a collective of female musicians, artists, engineers, computer scientists and researchers, Female Laptop Orchestra has been pushing the boundaries of technology and cross-cultural co-located and distributed collaborative music making since 2014. Besides musical instruments, we use a variety of open source and commercial tools to create music, stream music and connect with our audience during the performance. We often collaborate with classical composers and ensembles, filmmakers, visual designers, choreographers and dancers. Recently, we also collaborated with members of Women in Music Technology (a student organization whose goal is to encouraging more women to join the music tech field of study and highlight the often unsung role of women in music technology, based at Georgia Tech Centre for Music Technology in US) and Sonora (a collaborative network bringing together artists and researchers interested in feminist manifestations in the context of the arts, based in Brazil). * Nela Brown is a sound artist, technologist, researcher and educator. In the past decade, she composed music and designed sound for award-winning projects including theatre performances, dance, mobile, film, documentaries and interactive installations. She is the founder of the Female Laptop Orchestra (FLO), an eclectic group of female musicians and technologists exploring co-located and distributed collaborative music making within different contexts and across different geographical locations. As a creative director of FLO since 2014, Nela co-ordinated 7 national and international FLO performances involving 36 collaborators from 21 different countries. — Talk #3 TBA Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. Closing date for bookings is Tuesday 16th January 2018 at 11:30 pm. No more bookings will be taken after this date. For overseas delegates who wish to attend the event please note that BCS does not issue invitation letters // -- Andrew Back http://abopen.com

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OSHUG 62 — RISC-V, RISC-V, RISC-V, Thursday 23rd November.
by Andrew Back 08 Nov '17

08 Nov '17

Hello, Details can be found below for the 62nd meeting, the theme for which is the RISC-V open ISA. Regards, Andrew // Event #62 — RISC-V, RISC-V, RISC-V On the 23 November 2017, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/62 The sixty-second meeting will be on the theme of RISC-V, an open ISA which started life at the University of California, Berkeley. A joint meeting with the BCS Open Source Specialist Group. — Bringing up cycle-accurate models of RISC-V cores The openness of the RISC-V ISA has enabled the development of many open-source RISC-V cores with varying capabilities. Choosing an implementation that meets given requirements can be done to some extent by comparing specifications and other attributes of the cores, but any decision must be based on actual testing. Using Verilator to generate cycle-accurate models enables rapid development of testing platforms. This talk provides a report of our experience bringing up cycle-accurate models of two cores in particular, RI5CY from the PuLP project, and Clifford Wolf's PicoRV32. For testing, a software ecosystem consisting of a compiler, binary utilities, debugger, and an interface between the model and debugger accompanies the Verilator model. To compare the cores, we used the GCC test suite and the RISC-V ISA test suite for measuring correctness, and the Bristol/Embecosm Embedded Benchmark Suite (BEEBS) to compare performance. All code and scripts used for the implementation are open-source, and can be re-used by others who wish to do similar exercises with other RISC-V cores. * Edward Jones has a background in parsing techniques and works at Embecosm on LLVM and GNU toolchains. He is also involved in research by Embecosm to investigate ways in which the software tool chain can reduce program energy consumption. Edward Jones is a Computer Science graduate of the University of Kent. — FreeBSD/RISC-V and Device Drivers The FreeBSD port to RISC-V 64-bit ISA was added in January 2016. FreeBSD is the first operating system that officially supported RISC-V in the main repository. Since its introduction, support has evolved, RISC-V privileged architecture has updated a few times. The platform is maturing making it suitable for general, commercial, research and educational use. The GCC v7.0 target for RISC-V was officialy upstreamed and NVIDIA is planning to ship all of their GPUs with RISC-V coprocessor enabled in the future. Several companies have announced the start of RISC-V chip development and many universities are taking RISC-V as a target architecture for doing research. The world first RISC-V microcontroller-class board HiFive1 was released and we are getting closer to the first general purpose board to become available! This talk will describe the current status of FreeBSD/RISC-V, toolchain and supported simulators. The porting process as well as describing the latest changes made to FreeBSD in order to support the latest RISC-V privilege specification (v1.10). This includes enabling by default FDT support and drivers attachment change, SBI interface, compiler flags/built-in definition changes, support for updated BBL boot loader, RISC-V privilege levels, initial page tables build, page table entry flags and other changes. An overview of FreeBSD device drivers subsystem will also be covered describing the device frameworks, buses and kernel-interfaces that exists in FreeBSD (e.g. Newbus, cdevsw, bus_dma, SYSINIT, vt, sound, ifnet, spibus, etc), how to use and configure them and how to debug a device driver. This should answer the question: How to write device driver for FreeBSD/RISC-V? * Ruslan Bukin is a Research Associate at University of Cambridge Computer Laboratory. He has been a FreeBSD user since 2002 and src committer since 2013. His main interests and contributions to FreeBSD are related to computer architectures support, performance monitoring technologies support, hardware tracing technologies (Intel PT), devicedrivers, DMA engines and DMA frameworks, hardware security (Intel SGX, CHERI), heterogeneous computing. Ruslan is the lead developer of the FreeBSD/RISC-V project. He obtained a Computer Science degree in 2008 from Peoples' Friendship University of Russia in Moscow — Talk #3 TBA Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. Closing date for bookings is Tuesday 21st November 2017 at 11:30 pm. No more bookings will be taken after this date. For overseas delegates who wish to attend the event please note that BCS does not issue invitation letters -- Andrew Back http://abopen.com

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OSHUG 61 — Reimagining EDSAC, NetBSD Updates, Semantic & Change Coupling of Software Classes, Thurs 19th October.
by Andrew Back 10 Oct '17

10 Oct '17

Hello, Details can be found below for the 61st meeting, which is in just over a week, so please don't delay in registering if you plan to attend. Best, Andrew // Event #61 — OSSG AGM, Reimagining EDSAC, NetBSD Updates, Semantic and Change Coupling of Software Classes. On the 19 October 2017, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/61 The meeting this month will start with the BCS OSSG AGM and this will be followed by a talk on recent and planned improvements to NetBSD, a report from Chip Hack EDSAC Challenge, and finally a talk on the interplay between semantic coupling and co-change of software. — BCS Open Source SG - AGM All members of OSHUG are welcome to attend and OSHUG members are encouraged to put themselves forward to join the committee. In particular we would welcome anyone to join the event organizers who arrange the speakers for each month and the occasional all-day workshops. Currently we have Sevan Janiyan, @ndy Bennett and Andrew Back as event organizers on the committee. — Updates to the NetBSD operating system since OSHUG #57 & #58 Since the workshops held earlier this year, numerous changes have been made to the NetBSD operating system to ensure future workshops are easier for users and work smoother from the outset. This talk will cover some of the improvements made so far and what's currently in the works. >From wrestling with the u-boot firmware to new tools included in the os and much more. * Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. — Reimagining EDSAC: The ChipHack experience ChipHack is an occasional 2 day workshop introducing students and hobbyists to FPGA design. This year, ChipHack was sponsored by the BCS OSSG and Computer Conservation Society. To celebrate the 60th anniversary of the BCS, the workshop was extended by half a day and attempted to reimagine one of the earliest valve computers, EDSAC, designed by the BCS' founding president, Prof Sir Maurice Wilkes. * Mary Bennett led the team putting together the technical content of the workshop. She will report back on what was achieved, from the three implementations of the computer, to the diverse reimagining of the original peripherals. The result is a legacy of lectures and videos, to allow anyone to run their own ChipHack course. — The Interplay between Semantic Coupling and Co-Change of software classes During maintenance, developers must ensure that related entities are updated to be consistent with these changes. Studies in the static change impact analysis domain have identified that a combination of source code and lexical information outperforms using each one when adopted independently. The presentation has two aims: first, to compare the effectiveness of measuring semantic coupling of OO software classes using (i) simple identifier based techniques and (ii) the word corpora of the entire classes in a software system. Second, to empirically investigate the interplay between semantic and change coupling. * Dr Andrea Capiluppi joined the Department of Computer Science at Brunel University London (UK), as a Lecturer in Software Development in May2012. Between 2009 and 2012 he was at University of East London, working as a Senior Lecturer in Software Engineering. Before that, he worked as a Senior Lecturer and at University of Lincoln between 2006 and 2009. Andrea's research and teaching interests focus on Software Evolution and Maintenance, as well as the construction, evaluation and maintenance of Social Networks. Andrea is mostly interested in the use of open technologies and in understanding how they can improve learning and teaching as well as the production of software and other artefacts. Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. // -- Andrew Back http://abopen.com

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OSHCamp 11th talk added and accommodation.
by Andrew Back 14 Aug '17

14 Aug '17

Hello, An 11th talk has been added to the programme for Open Source Hardware Camp on Sat 2nd September, entitled Conservatory and Garden Automation. Details of which can be found below. If you haven't registered yet, you can find full programme details and the Eventbrite link at: http://oshug.org/event/oshcamp2017 Finally, the Cross Inn at Heptonstall now have rooms and so if you haven't booked accommodation yet, it's worth checking out. http://www.thecrossinnheptonstall.co.uk/ 01422 846607 They said they will give a £10 discount to people booking for Wuthering Bytes events. It's also the venue for the OSHCamp social this year and so particularly handy if you plan to attend this. Regards, Andrew // — Conservatory and Garden Automation Rod will talk about his recent conservatory project where he grows exotic plants, and how he has used Arduino to automate the heating, cooling & ventilation, humidification and irrigation, and how a Windows PC is used as the user interface to provide monitoring, set-point adjustment, calibration and data logging. The brief introduction explains how he came to choose Arduino as his preferred microcontroller, while a background picture show takes you through the construction and planting phases of the conservatory. He then goes on to talk about: Heating Humidification Cooling and ventilation by pneumatic control of the windows Irrigation Choice of all hardware, actuators, solenoid valves, relay boards, power supplies etc. Choice of sensors for temperature, humidity and water flow EMI testing, analogue R.C filtering and digital filtering of the analogue inputs from the sensors The design of a capacitance probe for measuring both pond water level and soil moisture level * Rod Moody worked as an electrical engineer in the manufacturing industry primarily building diesel-engine driven electrical generators ranging from a few kW to a few MW for both base load and standby applications. At 15 years of age he started an electrical engineering apprenticeship and through day release and night class gained an HNC in electrical engineering. At the age of 19 he was the companies test department manager, this soon led to many trips around the world to provide commissioning, trouble shooting and training. In his mid-twenties he moved into R&D and designed many control systems using relay logic. As technology advanced, and as a self-taught electronics engineer, he designed complex control systems using CMOS logic. In his thirties he was promoted to the company's engineering director. He retired at the age of 60, some 17 years ago. -- Andrew Back http://abopen.com

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OSHUG 58 — Getting started with NetBSD on embedded platforms Pt. 2, Thursday 18th May.
by Andrew Back 09 May '17

09 May '17

Hello, Registration is now open for the fifty-eighth meeting, which will provide a hands-on introduction to NetBSD on embedded platforms, picking up where the workshop left off at the previous meeting in April. Regards, Andrew // Event #58 — Getting started with NetBSD on embedded platforms Pt. 2 On the 18 May 2017, 17:30 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/58 — Workshop scope Following on from the previous workshop, we will be continuing with the theme of NetBSD on embedded platforms. This time covering GPIO access with lua and rapid development with Rump kernel, which we did not get to in the previous workshop due to the lack of time. If you did not get to attend the previous workshop, not to worry, notes are available [1] and assistHello, Registration is now open for the fifty-eighth meeting, which will provide a hands-on introduction to NetBSD on embedded platforms, picking up where the workshop left off at the previous meeting in April. Cheers, Andrew // Event #58 — Getting started with NetBSD on embedded platforms Pt. 2 On the 18 May 2017, 17:30 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/58 — Workshop scope Following on from the previous workshop, we will be continuing with the theme of NetBSD on embedded platforms. This time covering GPIO access with lua and rapid development with Rump kernel, which we did not get to in the previous workshop due to the lack of time. If you did not get to attend the previous workshop, not to worry, notes are available [1] and assistance will be provided on the day. [1] http://oshug.org/pipermail/oshug/2017-April/000608.html — Participant requirements You will need to bring: * Your own laptop (running Windows, Linux or Mac OS X); * A Raspberry Pi or BeagleBone Black; * An appropriate SD card for your board; * USB card reader to write a new OS image onto said SD card; * An ethernet cable to connect board to laptop and/or a USB UART/FTDI adapter to access the board via the serial console. — Windows 10 users Install Windows Subsystem for Linux. — Windows 10 / Linux (Debian/Ubuntu) users Install the following packages: * build-essential * zlib1g-dev * flex * libc6-dev-i386 — Mac OS X users Install GCC or clang via Xcode or command line tools. — All Everyone should fetch the source code for NetBSD: Download all source archives (.tgz files) from http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD/201704270800Z/source/sets/ . (It is likely the above URL will become invalid as old builds are purged and new ones are generated. Substitute 201704270800Z with the most recent release available on http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD). Any questions should be directed to the discussion list. — Hosted by Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Note: Please aim to arrive by 17:15 as the workshop will start at 17:30 prompt. ance will be provided on the day. [1] http://oshug.org/pipermail/oshug/2017-April/000608.html — Participant requirements You will need to bring: * Your own laptop (running Windows, Linux or Mac OS X); * A Raspberry Pi or BeagleBone Black; * An appropriate SD card for your board; * USB card reader to write a new OS image onto said SD card; * An ethernet cable to connect board to laptop and/or a USB UART/FTDI adapter to access the board via the serial console. — Windows 10 users Install Windows Subsystem for Linux. — Windows 10 / Linux (Debian/Ubuntu) users Install the following packages: * build-essential * zlib1g-dev * flex * libc6-dev-i386 — Mac OS X users Install GCC or clang via Xcode or command line tools. — All Everyone should fetch the source code for NetBSD: Download all source archives (.tgz files) from http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD/201704270800Z/source/sets/ . (It is likely the above URL will become invalid as old builds are purged and new ones are generated. Substitute 201704270800Z with the most recent release available on http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD). Extract all fetched source code files. In your terminal, enter: for file in *.tar.gz do tar -xzf $file done Any questions should be directed to the discussion list. — Hosted by Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Note: Please aim from 17:30 onwards for an 18:00 start. -- Andrew Back http://abopen.com

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OSHUG 57 — Getting started with NetBSD on embedded platforms, Thursday 20th April.
by Andrew Back 20 Mar '17

20 Mar '17

Hello, Registration is now open for the fifty-seventh meeting, which will be an evening workshop, providing a hands-on introduction to NetBSD on embedded platforms. Details of which can be found below. Regards, Andrew // OSHUG #57 — Getting started with NetBSD on embedded platforms On the 20 April 2017, 17:30 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/57 — Workshop scope You're hired at the latest startup as a hardware engineer and required to build the firmware which will run on "The Greatest Next Generation Appliance" (GNA). The GNA boots, prints a message and interacts with a device (in this case an LED). In this workshop we cover how a person with an interest and a focus on hardware can make progress with the software side by using the NetBSD operating system and the features it offers to save considerable time and effort. * NetBSD supports a wide & diverse range of systems & CPU architectures. * Support for cross compilation is offered by default and works out of the box. * There is a high level language interface to interact with the system internals. * File integrity verification support to detect tampering of binaries and preventing execution is builtin. * An instance of the kernel can be run as a user process on different operating systems where rapid development can take place. Things we will cover: 1. An introduction to cross-compilation with build.sh and constructing an image to boot on your hardware. 2. Interacting with the system using Lua (which is embedded in the kernel, avoiding having to write C or have knowledge of OS internals) to e.g. access GPIO. 3. Preventing the execution of tampered or unauthorised binaries with veriexec. 4. Using rump kernel for rapid development away from a potentially slow dev board. ** Note: Due to budgeting cuts, "The Greatest Next Generation Appliance" has not yet been purchased, so, the workshop will target the development of the firmware on a Raspberry Pi or BeagleBone Black.** — Participant requirements You will need to bring: * Your own laptop (running Windows, Linux or Mac OS X); * A Raspberry Pi or BeagleBone Black; * An appropriate SD card for your board; * USB card reader to write a new OS image onto said SD card; * An ethernet cable to connect board to laptop and/or a USB UART/FTDI adapter to access the board via the serial console. — Hosted by Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Note: Please aim to arrive by 17:15 as the workshop will start at 17:30 prompt. -- Andrew Back http://abopen.com

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OSHUG 56 — An introduction to software-defined radio with LimeSDR (workshop), Fri 24th March.
by Andrew Back 13 Feb '17

13 Feb '17

Hello, Registration is now open for the fifty-sixth meeting, which will be a one day workshop, providing a hands-on introduction to software-defined radio with the LimeSDR. This will cover key concepts and LMS7002M FPRF IC architecture, and include simple digital radio examples along with a demonstrations of advanced systems, such as 4G femtocell. Details can be be found below. Regards, Andrew // OSHUG #56 — An introduction to software-defined radio with LimeSDR On the 24 March 2017, 09:00 - 17:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: https://events.bcs.org/book/2451/ A Software-Defined Radio (SDR) is a highly reconfigurable radio that can be used for many different radio applications through simply changing the software that links with it. An example of such a reconfigurable radio is the LimeSDR, which can both transmit and receive data and voice, using just about any wireless system. The LimeSDR was launched by Lime Microsystems in May 2016 via a crowdfunding campaign, and is now shipping to over 3,500 customers worldwide. It is based on the Lime Microsystems LMS7002M Field Programmable RF (FPRF) 2x2 MIMO transceiver, which continuously covers frequencies from 100kHz to 3.8GHz. The LMS7002M has been successfully used in a wide range of digital radio applications, including 2G/4G Femtocell base stations, GNSS, DAB, DVBT receivers and RF test and measurement equipment. The LimeSDR also includes an FPGA and USB 3.0 to provide host connectivity. — Workshop scope The heart of the day is to provide a practical ‘hands-on’ afternoon session using the LimeSDR with the Lime Suite GUI and FFT Viewer. Then to use GNU Octave and Pothos to make some very simple digital radio examples. To facilitate this, the morning will include introductory talks explaining the purpose of the various analogue and digital blocks included in the LMS7002M. It will also include tutorial material covering the key concepts required to understand modern digital radio transceivers, and how to use them, as well as practical issues associated with radio reception. In addition the day will feature some advanced demonstrations showing the full capabilities of the LimeSDR and its LMS7002M transceiver, including 4G Femtocell, as well as educational examples such as a simple OFDM transceiver data link. — Participant requirements ** Participants are required to bring a laptop computer with USB 3.0 ** Minimum computer hardware requirements are USB 3.0 capability and 2GB RAM. Although no prior knowledge of radio is required, an awareness of basic terminology will be very helpful. Basic computer programming and administration skills will also be helpful. The software that will be used must be installed prior to the event. For details see: https://wiki.myriadrf.org/LimeSDR_Workshop — What is provided * LimeSDR hardware will be provided for use during the workshop * A light lunch will be provided and please ensure that any dietary requirements are made clear during registration — Hosted by The workshop will be led by Dr. Danny Webster, who has over 25 years of experience in the field of RF design covering varied applications from military radio to cellular infrastructure. Danny Graduated from Swansea University in 1988 and was awarded a PhD from University College London in 1995. From 1995 he worked as a Research Fellow at University College London and was a consultant to companies such as Nokia, Roke Manor Research and Agilent in Santa Rosa. From 2001 he was with Hipertech and joined Lime Micro in 2005 as Principle Design Engineer (RF) working on Field programmable RF ICs. Danny is a senior member of the IEEE. This workshop is free to attend and hosted by Lime Microsystems in partnership with the BCS Open Source Specialist Group and the Open Source Hardware User Group. Note: Please aim to arrive by 08:45 as the workshop will start at 09:00 prompt. -- Andrew Back http://abopen.com

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Open Source Hardware Camp 2017 (2nd & 3rd Sept) Call for Participation.
by Andrew Back 09 Feb '17

09 Feb '17

Hello, This year Open Source Hardware Camp will take place over the weekend of Saturday 2nd & Sunday 3rd September, hosted as part of the Wuthering Bytes festival in Hebden Bridge, which in 2017 will take place over the course of 10 days (again!) We will be returning to the Birchcliffe Centre in Hebden Bridge, which benefits from the convenience of adjoining, budget accommodation. Proposals for talks and workshops for OSHCamp 2017 are invited! There is no theme and topics may include, for example: * Open source hardware projects * Open development practices and principles * Novel/interesting/fun projects built using open source hardware * Tools (hardware and software) * Skills and techniques, e.g. PCB fab, DIY SMT assembly * Relevant technologies, e.g. SPI/I2C bus programming * ...something else relevant to the community If you would like to give a talk on the Saturday and/or run a workshop on the Sunday please contact me off-list. **** Note that the deadline for submitting titles and abstracts is Monday 1st May. If you would like to discuss ideas etc. please get in touch sooner, rather than later. **** Other events running as part of Wuthering Bytes 2017 and which may be of interest: * Fri 1st: Wuthering Bytes Festival Day * Wed 6th & Thurs 7th: Chip Hack (http://chiphack.org/) * Thurs 7th PM & Fri 8th AM: EDSAC Challenge * Fri 8th AM - Sunday 10th PM: GNU ORConf (http://orconf.org/) Further details on these events to be provided in due course. Cheers, Andrew PS. If you are planning on coming along and thinking of staying at the adjoining hosted, it is worth noting that this can book up quickly. http://www.hebdenbridgehostel.co.uk/ PPS. Super Early Bird tickets for the super organised: https://www.eventbrite.co.uk/e/open-source-hardware-camp-2017-tickets-31845… -- Andrew Back http://abopen.com

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OSHUG 55 — FPGA projects past, planned and possible, Thursday 16th February.
by Andrew Back 07 Feb '17

07 Feb '17

Hello, Registration is now open for the February meeting, details of which can be found below. We also still have space for 1 or 2 more short talks of 10-15 minutes, so if you have an idea for a talk, get in touch! regards, Andrew // Event #55 — FPGA projects past, planned and possible On the 16 February 2017, 18:00 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/55 The fifty-fifth meeting will feature a series of shorter talks that explore past, planned and possible projects which use FPGAs. — FPGA Projects - What would I build and why would I want to PLAs have been interesting ever since the 70s when digital logic often became complex, consuming unnecessary space and power. Back then the cost of PLA deployment was high and it has continued to be high until recently. Now that we have powerful, low cost development platforms and relatively cheap FPGAs the cost equation has shifted radically. * Paul Tanner is a consultant, developer and maker in wood, metal, plastic, electronics and software. His day job is IT-based business improvement for SMEs. By night he turns energy nut, creating tools to optimise energy use. Paul graduated in electronics and was responsible for hardware and software product development and customer services in several product and service start-ups, switching to consulting in 2000. — Using FPGAs to solve realtime problems Microcontrollers a great platform to solve basic control problems in electronics, with simple motor drivers and sensors readily avaiable and easy to integrate. However, when the motor control becomes more complex with BLDC and FOC things get much more tricky. When you have to use multiple BLDC motors and more complex sensors with image processing the poor microcontroller quickly becomes to swamped to provide control in realtime. This is where adding FPGA technology makes a great deal of sense particularly in mutli-discipline projects like robotics where many sensors, motors and image processing will need to be managed and controlled concurrently. A robotics platform must therefore contain both concurrent hardware resources, algorithmic control through soft or hard cores along with communication protocols. * Alan Wood has been working with parallel distributed programming for several decades. His recent work includes smart grids, 3D printers, robotics, automation and biotec diagnostics. His current research is focused on machine learning, inference and image processing for embedded applications using FPGA and multi-cores. He is a long term advocate and moderator (aka Folknology) for xCORE and other opensource communities, as well as a founder of Surrey and Hampshire Makerspace and myStorm FPGA development boards. — FPGAs in the Cloud? It is no secret that FPGA based computing machines are great at dealing with certain types of workloads that conventional CPU based machines can not efficiently handle. These machines, alongside their GPU and even custom ASIC based brethren, have been filling up racks in large data centres all over the globe helping speed up systems that have components of machine learning, complex analytics and even video processing. This short talk will have a look at the state of FPGAs in the datacenter and discuss the recent developments around the availability of FPGA equipped computing nodes in commodity cloud providers. * Omer Kilic is an Embedded Systems Engineer who enjoys working with small connected computers of all shapes and sizes. He works at the various intersections of hardware and software engineering practices, product development and manufacturing. — Chip Hack 2017 & EDSAC Challenge This talk will introduce and issue a call for participation for two events that are being hosted as part of the Wuthering Bytes technology festival, that will take place in Hebden Bridge in September, in the week following Open Source Hardware Camp 2017. Chip Hack is a two day hands-on workshop that provides a gentle introduction to programming FPGAs and is aimed at novices with no prior experience of Hardware Description Languages (HDLs) or FPGAs. This will be followed immediately by a challenge event, during which a small team of experts will work to extend a basic functional FPGA model of EDSAC — the pioneering computer designed and constructed at Cambridge University, and which was operational by 1949. * Dr Jeremy Bennett is founder and Chief Executive of Embecosm, a consultancy implementing open source compilers and chip simulators for major corporations around the world. He is a author of the standard textbook "Introduction to Compiling Techniques" (McGraw-Hill 1990, 1995, 2003). Contact him at: jeremy.bennett(a)embecosm.com. Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. // -- Andrew Back http://abopen.com

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