Hi folks, This months virtual BCS OSSG meeting is on the theme of POWER ISA from IBM & PowerPC with talks about the PowerPC laptop project and OpenPOWER from IBM.

As usual, you can serve your own tea and biscuits from 6pm :) and join the event (url below), with the talks starting at 6:30.

The meeting is going to be hosted at https://meet.gwdg.de/b/jul-u4v-l81-jna (there is no registration involved)

Prepare yourself for the Open Hardware GNU/Linux PowerPC Laptop

https://www.powerpc-notebook.org/en/ We expect before the end of 2021 to see the life of the first three prototypes of Open Hardware GNU/Linux PowerPC Laptop. The project started in late 2014, After a brief summary of the previous episodes, we try to describe the scenarios of the immediate future of the project and how each person can be driven by a certain passion for both progress for all and how the sharing of knowledge can be a protagonist in this project.

Roberto Innocenti is one of the founders of the project Open Hardware PowerPC Notebook and an ambassador of the project. President of the association Power Progress Community which deals with the promotion and dissemination of free software and open hardware. Ambassador and responsible in the last humanist forums of the area “Technology for improving the living conditions of mankind”. Roberto is a software architect with Open Source tools, by profession.

OpenPOWER Overview and latest key collaborations with OpenPOWER Academia

Ganesan Narayanasamy is an OpenPOWER/POWER leader for Academia and research at the IBM Lab. Ganesan is best known for his contributions to High Performance Computing as senior leader for nearly 1.5 decades. He is also leading the WW Academia work group for OpenPOWER and putting together OpenPOWER ECO System development activities like setting up OpenPOWER and AI center of excellence, OpenPOWER labs, Curriculum development etc. Ganesan is always passionate about working with Universities and research Institutes and provide all kinds of technical mentoring

Concept to Silicon Tape out using OpenPOWER Cores

Arjun Nag has been leading Design Verification field of VLSI for more than a decade with hands on experience in System Verilog , Verilog and VHDL. He has been mentoring many researchers in SoC , RTL related areas.

See you there,

Sevan