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OSHCamp travel, accommodation and social.
by Andrew Back 16 Feb '18

16 Feb '18

Hi All, Thanks to Sarah we are particularly well organised this year and below you can find details of the venue, local accommodation and travel for OSHCamp 2018. We have our own room reserved at The Wig and Mitre (http://www.wigandmitre.com/) for the social on the evening of Sat 30th June, with details of the venue (pub!) for pre-OSHCamp drinks on Fri 29th to follow. The first few talks and workshops have been confirmed and just a reminder that the closing date for proposals is a little over a month away, 25th March. So if you would like to give a talk and/or host a workshop, please enter details via the form at: https://docs.google.com/forms/d/1pLyItcKRDYmegNXtAXRgpt21yOFXdWlBO_K6uu0LlB… Cheers, Andrew // — Venue The event will be held at The Blue Room, The Lawn, Union Road, Lincoln, LN1 3BU (map location https://goo.gl/maps/mdW1g8Pmk492). Lincoln is a city of two halves, the uphill and the downhill. The OSHUG venue is located uphill in the historic area of the city, home to the castle and cathedral, museums, pubs and a quaint shopping area The Bailgate. The downhill area of Lincoln is the shopping and transport hub, and also contains the Brayford Pool and most ‘night-life’. — Where to stay There are a variety of accommodation options within and around Lincoln from self-contained lets, guest houses, hotels, farms and camping. Visit the Visit Lincoln Website for lots of options, https://www.visitlincoln.com/stay/ Some nearby, reasonably priced accommodation includes: 202 Guest House, 07767 497 189 http://www.202guesthouse.co.uk/lincoln/rooms-and-accommodation.asp (0.5 miles from conference venue – mid hill location.) St Clements Old Rectory Apartments, 5 Self Catering Apartments and 1 Guest room available, (0)1522 538087 http://www.stayatstclements.co.uk/ (0.5 miles from conference - uphill location). 2 Night minimum. — Travel For downloadable PDF maps and guides of Lincoln including Bus Routes, Cycle Routes and a Train Map visit the Visit Lincoln website. * By Road >From the North Via the A15 (Hull) or the A46 (Grimsby) >From the South Via the A46 (Leicester, Nottingham, Newark) or the A1 and A15 (London, East Anglia) >From the East Via the A158 (Skegness) >From the West Via the A1 and A57 (Leeds, Worksop, Sheffield) * Lincoln Car Parks There is a large council run car park at The Lawn, chargeable on the day at the ticket machines. (Has 2 fast-charge spaces.) There are many other car parks in the area, and both up and downhill. https://en.parkopedia.co.uk/parking/parking_in_lincoln/ Electric Charging points - https://www.lincoln.gov.uk/living-in-lincoln/transport-travel-and-parking/p… * By Train Lincoln Central railway station is located in the south of the city centre within easy walking distance of Lincoln High Street, the main shopping areas and the historic Cathedral Quarter. Direct connections are provided by East Midlands Trains, Virgin Trains East Coast and Northern Rail which operate daily services to Peterborough, Leicester, Nottingham, Sheffield, Doncaster and London. We would advise you to plan your trip in advance with an online route planner or by phone with TrainTracker 0871 200 49. More information on the train station and its services can be found here. You can find the station at: Lincoln Railway Station St Mary’s Street Lincoln Lincolnshire LN5 7EW The train station is fully accessible for wheelchairs. * By Bus There are good bus connections throughout Lincolnshire and Lincoln. Lincoln Bus Station: You can find the (brand new!) central bus station, near the train station and at: 18-20 Sincil Bank, Lincoln LN5 7ET For all timetable and route information please visit the Lincolnshire County Council website or call in to the Travel Shop at the bus station. Local operators include Stagecoach and PC Coaches. Walk & Ride Steep Hill Shuttle: The Lincoln Walk & Ride Steep Hill Shuttle is a useful local bus service which operates to link the Cathedral Quarter with the High Street, Cultural and Brayford Waterfront Quarters stopping at most key points across the city. The Walk & Ride Steep Hill Shuttle runs 6 days a week throughout the year: Monday to Saturday: 9.10am – 2:47pm, 4:10pm – 5:22pm. Walk & Ride tickets can be purchased on the bus. Park and Ride: For details see: https://lincolnbus.co.uk/special-services/lincoln-park-and-ride -- Andrew Back http://abopen.com

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OSHUG 65 — Yanking the Chain: open source software compliance in the supply chain, Thursday 22nd March.
by Andrew Back 06 Feb '18

06 Feb '18

Hello, We have another 1-day event in March, which this time will be dedicated to the topic of open source software compliance, featuring talks and workshops on topics such as OpenChain, SW360 and FOSSology. There are additional sessions in the pipeline, but we were keen to get details out sooner rather than later, given this is a full day, now less than 2 months away, and diaries fill up quick. Further details will be provided in due course! Cheers, Andrew // OSHUG #65 — Yanking the Chain: open source software compliance in the supply chain On the 22 March 2018, 09:00 - 17:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/65 With the ever increasing complexity of embedded device software stacks, coupled with the proliferation of new mechanisms for distributing complex server software stacks, open source compliance has never been more important — or indeed more of a challenge. Fortunately, there are growing number of tools and methods at our disposal to support open source software compliance efforts. This 1-day event will feature talks and hands-on workshops covering a number of these, with insights into practical experiences and lessons learned. The preliminary programme can be found below and please note that further details will be published in due course as additional sessions are confirmed. ***Talks — Introducing OpenChain OpenChain is a scalable, flexible compliance programme, developed by the Linux Foundation. It provides a great foundation for businesses of all sizes to adopt appropriate practices and procedures in place to control development and supply chain risks. Already adopted by companies like Qualcomm, Toyota and ARM, it's equally applicable to SMEs. * Andrew Katz is a lawyer and former programmer who advises extensively on free and open source software and other opens. He is head of the technology department at Moorcrofts LLP, a boutique technology law firm, which is one of the 5 OpenChain pilot partners in the world, and has been involved in drafting many of the OpenChain materials. — Eclipse SW360 - Open Source Management with Open Source SW360 manages software components with their license compliance documentation in SPDX and allows for setting up bills-of-material to provide comprehensive documentation for products and projects. Organizations can use SW360 as a one-stop shop for sharing component information, tracking their usage in projects or products. This involves the handing of compliance information, but also, as an example, matching for vulnerabilities from data providers. As an EPL-1.0 licensed Open Source project, it is highly customizable, letting organizations keep their confidential product development data on premises, and prevents them from becoming dependent on a single vendor. This presentation shows briefly features and a walk through the application to demonstrate capabilities and use cases of SW360. * Michael C. Jaeger is one of the maintainers for the projects, FOSSology and SW360, both of which are in the area of license compliance and component management with open source software. At Siemens Corporate Technology in Munich, Germany, Michael manages the Siemens contributions to SW360 and FOSSology. Michael is a certified software architect and received a German PhD degree from the faculty of electrical engineering and computer science at TU Berlin. *** Workshops — Using FOSSology - License Analysis Hands On FOSSology is an open source license compliance software system and toolkit. As a toolkit, you can run license, copyright and export control scans from the command line. As a system, a database and Web user interface provide you with user interface and functionality to analyse the licensing situation of open source software. * Hosted by: Michael C. Jaeger. Note: Please aim to arrive by 08:45 as the workshop will start at 09:00 prompt. -- Andrew Back http://abopen.com

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OSHUG 63 — Collaborative music making, ultra-low latency audio and sensor processing.
by Andrew Back 19 Jan '18

19 Jan '18

Hello, Details can be found below for the 63rd and first meeting of 2018, the theme for which is open source musical software and hardware. I should note also that this is another excellent programme that we have Sevan to thank for putting together. Cheers, Andrew // Event #63 — Collaborative music making, ultra-low latency audio and sensor processing. On the 18 January 2018, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. http://oshug.org/event/63 We start the new year with an event on the theme of open source musical software and hardware. — Bela, an embedded platform for ultra-low latency audio and sensor processing Bela started off as a research project at Centre For Digital Music (Queen Mary University of London) and is now a commercial product, mainly aimed at makers, programmers and researchers that work with audio. The platform is based on a BeagleBone Black with a custom expansion cape and a dedicated software environment. The board runs Debian Linux with Xenomai as a real-time co-kernel. The combined use of Xenomai and the BeagleBone Black's on-board PRU microcontroller allows to achieve sub-millisecond latency for audio and sensor processing, while node.js is used to provide a user-friendly web-based IDE. The project is entirely open source, hardware and software. * Giulio Moro is a PhD student in the Centre for Digital Music at Queen Mary University of London. A sound engineer by training, he is now researching in the field of performer-instrument interaction. He is one of the inventors and core developers of Bela. — Female Laptop Orchestra: exploring geographical, cultural, technical and artistic challenges of collaborative music making As a collective of female musicians, artists, engineers, computer scientists and researchers, Female Laptop Orchestra has been pushing the boundaries of technology and cross-cultural co-located and distributed collaborative music making since 2014. Besides musical instruments, we use a variety of open source and commercial tools to create music, stream music and connect with our audience during the performance. We often collaborate with classical composers and ensembles, filmmakers, visual designers, choreographers and dancers. Recently, we also collaborated with members of Women in Music Technology (a student organization whose goal is to encouraging more women to join the music tech field of study and highlight the often unsung role of women in music technology, based at Georgia Tech Centre for Music Technology in US) and Sonora (a collaborative network bringing together artists and researchers interested in feminist manifestations in the context of the arts, based in Brazil). * Nela Brown is a sound artist, technologist, researcher and educator. In the past decade, she composed music and designed sound for award-winning projects including theatre performances, dance, mobile, film, documentaries and interactive installations. She is the founder of the Female Laptop Orchestra (FLO), an eclectic group of female musicians and technologists exploring co-located and distributed collaborative music making within different contexts and across different geographical locations. As a creative director of FLO since 2014, Nela co-ordinated 7 national and international FLO performances involving 36 collaborators from 21 different countries. — Talk #3 TBA Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. Closing date for bookings is Tuesday 16th January 2018 at 11:30 pm. No more bookings will be taken after this date. For overseas delegates who wish to attend the event please note that BCS does not issue invitation letters // -- Andrew Back http://abopen.com

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OSHUG 64 — Intel® Movidius™ Neural Compute Stick Workshop, Thursday 22nd February.
by Andrew Back 29 Dec '17

29 Dec '17

Hi All, Registration is now open for the first workshop of 2018, which will provide hands-on experience with using the Intel Movidius Neural Compute Stick and open source frameworks to deploy deep neural networks. As this is likely to prove popular, registering sooner rather than later is recommended if you do plan to come along. Cheers, Andrew // OSHUG #64 — Intel® Movidius™ Neural Compute Stick Workshop. On the 22 February 2018, 09:00 - 17:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. http://oshug.org/event/64 Learn how to use the Intel® Movidius™ Neural Compute Stick and open source frameworks to deploy deep neural networks at the edge. — Workshop details Market research estimates there will be as many as 20 billion connected devices in the market by 2020. These devices are expected to generate billions of petabytes of data traffic between cloud and edge devices. In 2017 alone, 8.4B connected devices are expected in the market which is sparking a strong need to pre-process data at the edge. This has led many IoT device manufacturers, especially those working on vision based devices like smart cameras, drones, robots, AR/VR, etc., to bring intelligence to the edge. Through the recent addition of the Movidius™ VPU technology to its existing AI edge solutions portfolio, Intel is well positioned to provide solutions that help developers and data scientists pioneer the low-power intelligent edge devices segment. This workshop will provide hands-on experience with Intel’s Neural Compute Stick – a low-cost, form-factor developer kit for low-power vision based embedded inference applications. What You Will Learn: * Insights into how Movidius™ VPUs are pioneering DNN accelerated vision processing. * Introduction to hardware and software components of NCS. * Workflow of network profiling and application development using NCS. * Detection/Classification models * Advanced functionalities * Hands-on with advanced demos and sample codes built using NC SDK’s API framework, which includes support for Caffe and TensorFlow — Participant requirements ** Participants are required to bring a laptop computer with Ubuntu 16.04 and Neural Compute SDK installed ** https://github.com/movidius/ncsdk — What is provided * NCS hardware will be provided for use during the workshop * A light lunch will be provided and please ensure that any dietary requirements are made clear during registration — Hosted by The workshop will be hosted by Intel engineers. This workshop is free to attend and hosted by Intel in partnership with the BCS Open Source Specialist Group and the Open Source Hardware User Group. * Sponsored by DesignSpark — https://www.rs-online.com/designspark/home Note: Please aim to arrive by 08:45 as the workshop will start at 09:00 prompt. -- Andrew Back http://abopen.com

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Slides from yesterday's talks
by Sevan Janiyan 24 Nov '17

24 Nov '17

Hello, As requested, slides for Ed's talk are available at: https://www.geeklan.co.uk/files/erj-oshug62-riscv.pdf Ruslan's slides are available at: https://people.freebsd.org/~br/freebsd_riscv.pdf Regards, Sevan

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OSHUG 62 — RISC-V, RISC-V, RISC-V, Thursday 23rd November.
by Andrew Back 06 Nov '17

06 Nov '17

Hello, Details can be found below for the 62nd meeting. Best, Andrew // Event #62 — RISC-V, RISC-V, RISC-V On the 23 November 2017, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/62 The sixty-second meeting will be on the theme of RISC-V, an open ISA which started life at the University of California, Berkeley. A joint meeting with the BCS Open Source Specialist Group. — Bringing up cycle-accurate models of RISC-V cores The openness of the RISC-V ISA has enabled the development of many open-source RISC-V cores with varying capabilities. Choosing an implementation that meets given requirements can be done to some extent by comparing specifications and other attributes of the cores, but any decision must be based on actual testing. Using Verilator to generate cycle-accurate models enables rapid development of testing platforms. This talk provides a report of our experience bringing up cycle-accurate models of two cores in particular, RI5CY from the PuLP project, and Clifford Wolf's PicoRV32. For testing, a software ecosystem consisting of a compiler, binary utilities, debugger, and an interface between the model and debugger accompanies the Verilator model. To compare the cores, we used the GCC test suite and the RISC-V ISA test suite for measuring correctness, and the Bristol/Embecosm Embedded Benchmark Suite (BEEBS) to compare performance. All code and scripts used for the implementation are open-source, and can be re-used by others who wish to do similar exercises with other RISC-V cores. * Edward Jones has a background in parsing techniques and works at Embecosm on LLVM and GNU toolchains. He is also involved in research by Embecosm to investigate ways in which the software tool chain can reduce program energy consumption. Edward Jones is a Computer Science graduate of the University of Kent. — FreeBSD/RISC-V and Device Drivers The FreeBSD port to RISC-V 64-bit ISA was added in January 2016. FreeBSD is the first operating system that officially supported RISC-V in the main repository. Since its introduction, support has evolved, RISC-V privileged architecture has updated a few times. The platform is maturing making it suitable for general, commercial, research and educational use. The GCC v7.0 target for RISC-V was officialy upstreamed and NVIDIA is planning to ship all of their GPUs with RISC-V coprocessor enabled in the future. Several companies have announced the start of RISC-V chip development and many universities are taking RISC-V as a target architecture for doing research. The world first RISC-V microcontroller-class board HiFive1 was released and we are getting closer to the first general purpose board to become available! This talk will describe the current status of FreeBSD/RISC-V, toolchain and supported simulators. The porting process as well as describing the latest changes made to FreeBSD in order to support the latest RISC-V privilege specification (v1.10). This includes enabling by default FDT support and drivers attachment change, SBI interface, compiler flags/built-in definition changes, support for updated BBL boot loader, RISC-V privilege levels, initial page tables build, page table entry flags and other changes. An overview of FreeBSD device drivers subsystem will also be covered describing the device frameworks, buses and kernel-interfaces that exists in FreeBSD (e.g. Newbus, cdevsw, bus_dma, SYSINIT, vt, sound, ifnet, spibus, etc), how to use and configure them and how to debug a device driver. This should answer the question: How to write device driver for FreeBSD/RISC-V? * Ruslan Bukin is a Research Associate at University of Cambridge Computer Laboratory. He has been a FreeBSD user since 2002 and src committer since 2013. His main interests and contributions to FreeBSD are related to computer architectures support, performance monitoring technologies support, hardware tracing technologies (Intel PT), devicedrivers, DMA engines and DMA frameworks, hardware security (Intel SGX, CHERI), heterogeneous computing. Ruslan is the lead developer of the FreeBSD/RISC-V project. He obtained a Computer Science degree in 2008 from Peoples' Friendship University of Russia in Moscow — Talk #3 TBA Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. Closing date for bookings is Tuesday 21st November 2017 at 11:30 pm. No more bookings will be taken after this date. For overseas delegates who wish to attend the event please note that BCS does not issue invitation letters -- Andrew Back http://abopen.com

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Open Technology Workshop and Biomaker Fayre - 21 Oct 2017
by Jenny Molloy 12 Oct '17

12 Oct '17

Dear All I thought this event focused on open hardware in science might be of interest to this list - there are places left for attendees and exhibitors and all are welcome! Best wishes Jenny -- Dr Jenny Molloy Coordinator, OpenPlant and Synthetic Biology Strategic Research Initiative University of Cambridge @synbioSRI | http://www.synbio.cam.ac.uk/ @_OpenPlant | http://openplant.org/ Subscribe to OpenPlant <http://openplant.us10.list-manage2.com/subscribe?u=5a06e872cbcb323379912c47…> and SynBio SRI <http://cam.us10.list-manage.com/subscribe?u=0577ce1c25cff983caf75199a&id=f0…> newsletters and join the Cambridge Synthetic Biology Meetup group <http://www.meetup.com/Cambridge-Synthetic-Biology-Meetup/>. *Open Technology Workshop and Biomaker Fayre - 21 Oct 2017* Department of Engineering, University of Cambridge, Trumpington Street, Cambridge Open Technology Week will showcase and celebrate open and open source technologies for research and education developed across Cambridge and beyond. In the Open Technology Workshop, you'll see exciting talks on everything from distributed 3D printing in Africa, open hardware in Brazil and universities collaborating with companies to create open technologies in Denmark. The Biomaker Fayre in the afternoon will include demonstrations of open source biological instruments, lab and field equipment featuring over 40 teams who participated in the 2017 Biomaker Challenge <https://www.biomaker.org/>. All others with maker projects related to science and biology are invited to exhibit! We'll have everything from spectrometers for measuring the colour of penguin guano, microfluidics for tissue culture, to ultrasonic systems for measuring plant height and 3D printed modular microscopes. *More info and register now: http://tiny.cc/opentechweek <http://tiny.cc/opentechweek>* (£5-10 inc. lunch and drinks reception, free for exhibitors and those in financial hardship)

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OSHUG 61 — Reimagining EDSAC, NetBSD Updates, Semantic & Change Coupling of Software Classes, Thurs 19th October.
by Andrew Back 10 Oct '17

10 Oct '17

Hello, Details can be found below for the 61st meeting, which is in just over a week, so please don't delay in registering if you plan to attend. Best, Andrew // Event #61 — OSSG AGM, Reimagining EDSAC, NetBSD Updates, Semantic and Change Coupling of Software Classes. On the 19 October 2017, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/61 The meeting this month will start with the BCS OSSG AGM and this will be followed by a talk on recent and planned improvements to NetBSD, a report from Chip Hack EDSAC Challenge, and finally a talk on the interplay between semantic coupling and co-change of software. — BCS Open Source SG - AGM All members of OSHUG are welcome to attend and OSHUG members are encouraged to put themselves forward to join the committee. In particular we would welcome anyone to join the event organizers who arrange the speakers for each month and the occasional all-day workshops. Currently we have Sevan Janiyan, @ndy Bennett and Andrew Back as event organizers on the committee. — Updates to the NetBSD operating system since OSHUG #57 & #58 Since the workshops held earlier this year, numerous changes have been made to the NetBSD operating system to ensure future workshops are easier for users and work smoother from the outset. This talk will cover some of the improvements made so far and what's currently in the works. >From wrestling with the u-boot firmware to new tools included in the os and much more. * Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. — Reimagining EDSAC: The ChipHack experience ChipHack is an occasional 2 day workshop introducing students and hobbyists to FPGA design. This year, ChipHack was sponsored by the BCS OSSG and Computer Conservation Society. To celebrate the 60th anniversary of the BCS, the workshop was extended by half a day and attempted to reimagine one of the earliest valve computers, EDSAC, designed by the BCS' founding president, Prof Sir Maurice Wilkes. * Mary Bennett led the team putting together the technical content of the workshop. She will report back on what was achieved, from the three implementations of the computer, to the diverse reimagining of the original peripherals. The result is a legacy of lectures and videos, to allow anyone to run their own ChipHack course. — The Interplay between Semantic Coupling and Co-Change of software classes During maintenance, developers must ensure that related entities are updated to be consistent with these changes. Studies in the static change impact analysis domain have identified that a combination of source code and lexical information outperforms using each one when adopted independently. The presentation has two aims: first, to compare the effectiveness of measuring semantic coupling of OO software classes using (i) simple identifier based techniques and (ii) the word corpora of the entire classes in a software system. Second, to empirically investigate the interplay between semantic and change coupling. * Dr Andrea Capiluppi joined the Department of Computer Science at Brunel University London (UK), as a Lecturer in Software Development in May2012. Between 2009 and 2012 he was at University of East London, working as a Senior Lecturer in Software Engineering. Before that, he worked as a Senior Lecturer and at University of Lincoln between 2006 and 2009. Andrea's research and teaching interests focus on Software Evolution and Maintenance, as well as the construction, evaluation and maintenance of Social Networks. Andrea is mostly interested in the use of open technologies and in understanding how they can improve learning and teaching as well as the production of software and other artefacts. Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. // -- Andrew Back http://abopen.com

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BCS OSSG/OSHUG meeting 6:30pm 19 Oct 2017
by Jeremy Bennett 06 Oct '17

06 Oct '17

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi all, Rather later notice than usual, but the next meeting of BCS OSSG/OSHUG will take place on Thursday 19 October. We start with the BCS AGM (which is quite short) and then have two talks. BCS AGM - ------- All members of OSHUG are welcome to attend and OSHUG members are encouraged to put themselves forward to join the committee. In particular we would welcome anyone to join the event organizers who arrange the speakers for each month and the occasional all-day workshops. Currently we have Sevan Janiyan, @ndy Bennett and Andrew Back as event organizers on the committee. Reimagining EDSAC: The ChipHack experience - ------------------------------------------ Speaker: Mary Bennett ChipHack is an occasional 2 day workshop introducing students and hobbyists to FPGA design. This year, ChipHack was sponsored by the BCS OSSG and Computer Conservation Society. To celebrate the 60th anniversary of the BCS, the workshop was extended by half a day and attempted to reimagine one of the earliest valve computers, EDSAC, designed by the BCS' founding president, Prof Sir Maurice Wilkes. The workshop used the open source MyStorm board (created by OSHUG members Al Wood and Ken Boak) and the YoSys open source FPGA tool chain created by Clifford Wolf. Mary led the team putting together the technical content of the workshop. She will report back on what was achieved, from the three implementations of the computer, to the diverse reimagining of the original peripherals. The result is a legacy of lectures and videos, to allow anyone to run their own ChipHack course. Updates to the NetBSD operating system since OSHUG #57 & #58 - ------------------------------------------------------------ Speaker: Sevan Janiyan Since the workshops held earlier this year, numerous changes have been made to the NetBSD operating system to ensure future workshops are easier for users and work smoother from the outset. This talk will cover some of the improvements made so far and what's currently in the works. - From wrestling with the u-boot firmware to new tools included in the os and much more. Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Third talk TBA - -------------- Best wishes, Jeremy - -- Tel: +44 (1590) 610184 Cell: +44 (7970) 676050 SkypeID: jeremybennett Twitter: @jeremypbennett Email: jeremy.bennett(a)embecosm.com Web: www.embecosm.com PGP key: 1024D/BEF58172FB4754E1 2009-03-20 -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEARECAAYFAlnXMVAACgkQvvWBcvtHVOHIPACgj8k3njsFs5mSkDu2nRI7C8h/ hLUAnR8+tiLfstd7Jwr93cchY+jHGhKI =nNGr -----END PGP SIGNATURE-----

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OSHCamp 11th talk added and accommodation.
by Andrew Back 13 Aug '17

13 Aug '17

Hi All, An 11th talk has been added to the programme for Open Source Hardware Camp on Sat 2nd September, entitled Conservatory and Garden Automation. Details of which can be found below. If you haven't registered yet, you can find full programme details and the Eventbrite link at: http://oshug.org/event/oshcamp2017 Finally, the Cross Inn at Heptonstall now have rooms and so if you haven't booked accommodation yet, it's worth checking out. http://www.thecrossinnheptonstall.co.uk/ 01422 846607 They said they will give a £10 discount to people booking for Wuthering Bytes events. It's also the venue for the OSHCamp social this year and so particularly handy if you plan to attend this. Cheers, Andrew // — Conservatory and Garden Automation Rod will talk about his recent conservatory project where he grows exotic plants, and how he has used Arduino to automate the heating, cooling & ventilation, humidification and irrigation, and how a Windows PC is used as the user interface to provide monitoring, set-point adjustment, calibration and data logging. The brief introduction explains how he came to choose Arduino as his preferred microcontroller, while a background picture show takes you through the construction and planting phases of the conservatory. He then goes on to talk about: Heating Humidification Cooling and ventilation by pneumatic control of the windows Irrigation Choice of all hardware, actuators, solenoid valves, relay boards, power supplies etc. Choice of sensors for temperature, humidity and water flow EMI testing, analogue R.C filtering and digital filtering of the analogue inputs from the sensors The design of a capacitance probe for measuring both pond water level and soil moisture level * Rod Moody worked as an electrical engineer in the manufacturing industry primarily building diesel-engine driven electrical generators ranging from a few kW to a few MW for both base load and standby applications. At 15 years of age he started an electrical engineering apprenticeship and through day release and night class gained an HNC in electrical engineering. At the age of 19 he was the companies test department manager, this soon led to many trips around the world to provide commissioning, trouble shooting and training. In his mid-twenties he moved into R&D and designed many control systems using relay logic. As technology advanced, and as a self-taught electronics engineer, he designed complex control systems using CMOS logic. In his thirties he was promoted to the company's engineering director. He retired at the age of 60, some 17 years ago. -- Andrew Back http://abopen.com

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OSHUG #59 — CHERI CPU, Adding Security to Compilers, Trust & Provenance in Open Data, Thursday 27th July.
by Andrew Back 18 Jul '17

18 Jul '17

Hello, Registration is now open for the fifty-ninth meeting, featuring talks on trust and provenance in Open Data at GDS, adding security to compilers (LADA project and SECURE project), extending a RISC ISA to add capability enhancements for improved security (CHERI project). A big thanks to Sevan Janiyan and Andy Bennett for arranging this meeting! Details and registration link below. Cheers, Andrew // OSHUG #59 — CHERI CPU, Adding Security to Compilers, Trust & Provenance in Open Data. On the 27 July 2017, 18:00 - 21:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/59 After a brief hiatus we return this month for an evening of talks on the topics of trust and provenance in Open Data at GDS, adding security to compilers (LADA project and SECURE project), extending a RISC ISA to add capability enhancements for improved security (CHERI project). — Trust and provenance in Open Data T.B.A. — Adding security to compilers Information leakage via side channels is a widely recognised threat to cyber security. In particular small devices are known to leak information through physical channels, i.e. power consumption, electromagnetic radiation, and timing behaviour. Serveral implementation techniques and countermeasures are arising nowadays against this kind of threaths, but still only fully equipped testing labs with skilled people can afford to test new implementations against leakage attacks. We will focus on the information leakage due to timing behaviour and the possibility of 'cache-based' timing attacks. Then we will discuss about my work in the context of two projects (LADA project and SECURE project) which aim at bringing the skill of a testing lab to the desk of a developer of standard consumer devices, without the need for domain specific knowledge through the development of open source compilers. * Paolo Savini is an Intern Compiler Engineer at Embecosm Ltd working on the SECURE Project, where he is helping to bring the next generation of secure programming techniques to open source compilers. Prior to joining Embecosm he cooperated with the LADA project at the University of Bristol in order to explore the possility of creating compiler tools to help improve implementation of cryptography. Paolo is currently graduating at the University of Pavia (Italy), where he achieved a Bachelor degree in Electronic and Computer Engineering. — The CHERI CPU: Hardware-software co-design for security This talk will introduce the CHERI CPU and associated C/C++ compiler stack. Various design decisions in the project were made based on the needs of programming languages to support real-world code and the requirements of hardware implementation. The C specification is intentionally vague and it would be very easy to create a conforming implementation of the language if this were the only requirement, but a C environment is only as good as the code that it runs. In the CHERI project, we have investigated a number of common C idioms and ensured that these can be supported by our hardware, while simultaneously allowing fine-grained memory safety and coarser-grained compartmentalisation of C programs. * David Chisnall is a Senior Research Associate at the University of Cambridge. His primary research interest is safe interoperability between programming languages. Most recently, he has been working on this in the context of the CHERI project, creating an implementation of the C programming language that can be used safely in the same process as languages with stricter safety guarantees. He presented a case study of this, allowing Java and C code to coexist in the same process without violating any of the JVM's safety and security guarantees at ASPLOS earlier this year. David is an active open source contributor, having been an LLVM committer since 2008, a member of the FreeBSD Core Team for two successive terms, and the author / maintainer of widely deployed Objective-C and C++ runtime libraries. Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. -- Andrew Back http://abopen.com

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Open Source Hardware Camp 2017 — Sat 2nd & Sun 3rd September, Hebden Bridge.
by Andrew Back 01 Jun '17

01 Jun '17

Hi All, I'm pleased to announce that we have 8 talks and 6 workshops confirmed for Open Source Hardware Camp 2017, with a few more TBC. As ever, some really great topics being covered and excellent speakers. Should you be interested in giving a talk and have not yet put forward a proposal, please drop me a line off-list ASAP. As in previous years, there will be a social event on the Saturday evening and OSHCamp is once again being hosted to coincide with the Wuthering Bytes technology festival. You're encouraged to check the website for details of other participating events, as some are likely to be of interest. http://wutheringbytes.com/ We have some fantastic talks lined up for Festival Day, including a keynote from Dr David Hartley FBCS on the early history of computing in Britain, and one on particle accelerators (with live demo!) Cheers, Andrew // Open Source Hardware Camp 2017 On the 2nd September 2017, 09:00 Saturday morning - 16:00 on the Sunday afternoon at The Birchcliffe Centre, Birchcliffe Road, Hebden Bridge, West Yorkshire, HX7 8DG, UK. Registration: http://oshug.org/event/oshcamp2017 Open Source Hardware Camp 2017 will take place place in the Pennine town of Hebden Bridge. For the fifth year running it is being hosted as part of the Wuthering Bytes technology festival. Hebden Bridge is approximately 1 hour by rail from Leeds and Manchester. Budget accommodation is available at the Hebden Bridge Hostel which adjoins the venue, with private rooms available and discounts for group bookings. Details of other local accommodation can be found at www.hebdenbridge.co.uk. There will be a social event on the Saturday evening from 8PM. *** Saturday :: Talks *** — An introduction to RISC-V, a Free and Open RISC Instruction Set Architecture An Instruction Set Architecture (ISA) defines the interface between a computer's hardware and software, the valid instructions that the machine may execute. Unlike other ISAs (such as those from ARM, MIPS, Intel, etc.), the RISC-V ISA is provided under an open-source licence, giving anyone the freedom to create a RISC-V implementation. This freedom has enabled a proliferation of RISC-V implementations for a wide range of applications, from small 32-bit embedded cores up to complex 64-bit multicore superscalar designs. As RISC-V is a relatively new ISA, there are many parts of the ecosystem such as compilers, assemblers, simulators, debugging tools, and other supporting infrastructure in rapid concurrent development. This talk gives an overview of the RISC-V ISA, and takes a look at some of the more interesting RISC-V cores. We will take a short look at the present state of the RISC-V software ecosystem, and try to predict where we will see RISC-V implementations used in the future. * Dr Graham Markall has a background in languages and compilers for scientific computing, and is well known for his work on the Numba project. He is part of Embecosm’s GNU tool chain team, where his current projects include the implementation of security enhancements to the GCC and LLVM compilers for RISC-V and ARM, and the development a GCC-based toolchain for a customised RISC-V processor. — Artificial intelligence and Machine learning for embedded systems Artificial Intelligence (AI) and Machine Learning (ML) allow technology to automate what was previously considered unique to human intelligence, we already see this in big data with image classification, speech recognition and sentiment analysis to name just a few applications. How will this effect embedded systems and hardware, what part can open source play in this emerging area by embedding intelligence or intuition into future products. Alan will provide an overview the current state of machine learning and inference techniques used within embedded applications, he will show how open source software and hardware can be used to apply these ML techniques into embedded and robotics and projects. Areas covered will include Artificial Neural Networks (ANN), Recurrent Neural Networks (RNN), Reinforcement Learning (RL) along with differences between training and inference deployments. Alan will also discuss some emergent AI hardware areas such as energy efficient neuromorphic computation and processing which can perhaps commodify AI over the coming decades. With both open source software and hardware we are poised to rapidly advance both education, experimentation and development of machine learning into working embedded automation, there could not be a better time to get into this emerging area of technology. * Alan Wood has been working with parallel distributed programming for several decades. His recent work includes smart grids, 3D printers, robotics, automation and biotec diagnostics. His current research is focused on machine learning for embedded automation using FPGA, CSP and Neural Turing Machines. He is a long term advocate of open source communities, a moderator (aka Folknology) for xCORE, the co-founder of myStorm open hardware FPGA community, as well as a co-founder of Surrey and Hampshire Makerspace. — So you decided to run a workshop Over the past year many fixes/improvements/bug reports have been made for the NetBSD workshop to run smoothly. This talk covers the changes which go in to a project to insure a workshop goes smoothly on the day, how a workshop evolved, and what was done to prevent the same issues reoccurring. * Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. — An Introduction to Open Source for Film production : From Sensor to Post This discussion will be based on the future of Open Source and its relationship wth Film & TV Production. New colour developments through ACES (Academy Color Encoding System) and new approaches by vendors such as Blackmagic and, of course, Blender, we are seeing a wider adoption of Open Source. We will discuss ACES and Apertusº Axiom OS camera and see where the future may lie regarding OS and Film Production. * Daniel Mulligan started in cameras (assisting and focus pulling), before then graduating up the ranks to Camera Operating for F1, BBC Dramas then 2nd Unit Cinematography for Feature Theatrical Productions. Daniel also started and privately ran a rental house supplying digital cameras, plus an onset/location company providing location post and digital camera workflows. This culminated just recently with a 2-3 year stint at Technicolor as their locations digital dailies supervisor, looking after projects such as Jupiter Ascending, Mortdecai and The Man from UNCLE. Now running new Companies for Open Source Cinema and an imaging research Company called Cine Imaging Lab, Daniel is also writing new Courses for the University of Portsmouth for both Undergraduate and Masters Degree in Imaging Science and consulting for image workflows for Post Production and VFX Houses. During this time Daniel has seen a few changes and re-iterations of the current digital workflows and it has struck him over time how much we do rely on proprietary systems for most delivery. And perhaps quite rightly so, as the delivery requirements for VFX to DI, to onset LUTs and more need that service. — Some micro:bit stories Lawrence recently helped the BBC and a consortium of partner companies produce the micro:bit. He thinks there are some stories worth telling about the instigation and development of the product. - BBC micro:bit grew from the passion of real people, not publicity departments - Asking for a few million pounds is quite fun - Shenzhen may be fast, but ShenFen is pretty good too - Engineers like the probably-impossible - Some cost and design decisions - Your support would be much appreciated * Lawrence Archard grew up among heterodyne whistles of an amateur radio rig hand-built by his grandad, who started him off building a two-transistor musical oscillator. That led to him studying Music Technology at Keele University, then Electronics primarily as an excuse to stay there. After a spell designing synthesizers, he had to get a 'proper job' with a consultancy developing high-volume, cost-sensitive products across a range of industries - music, toys, construction, medical, office and kitchen appliances. He became an early proponent of IoT (but not for the fridge ordering milk) and left to work with an informal group of associates in 2000. As DevelAngel, Lawrence acts as interim CTO or project manager for angel and VC-funded startups. For mainstream R&D-for-hire, there is sister entity uPBeat Product Development. — Robot Operating System Robot Operating System is 8 years old, and despite the fact that it isn't actually an operating system has become the default platform for robotic research in Universities around the world. I will talk about the recent version of their turtlebot platform that has made the hardware side much more open, and may attempt a live demo. It might even work this time. In addition I will also talk about ROS2, the next version that is currently in development. * Nick Weldin initiated the first public Arduino course in the UK in 2005, because he didn't want to program PIC chips on the accounts computer at work after everyone else had gone home any more, and he couldn't get his boss to send him to the Arduino course that was running in Spain. When Tinker London started up he joined them and ran courses teaching Arduino wherever anyone was interested. He is co-author of the Arduino Cookbook and now works for Middlesex University. — BuggyAir for mobile personal pollution exposure monitoring Last year we did a trial of a consortium project called BuggyAir for mobile personal pollution exposure monitoring. This was based on GSM comms using a smartphone for that and GPS. This year we have made a second version with LoRaWAN comms and tested this in London. We have also demonstrated an initial version with a choice of the two comms approaches. We are about to do another trial in Cambridge and our partners are also working on another version of the hardware to make it smaller and lighter without compromising the sensor precision. * Paul Tanner is a consultant, developer and maker in wood, metal, plastic, electronics and software. His day job has evolved from IT-based business improvement for SMEs to a specialisation in Internet of Things system development. By night he turns energy nut, creating tools to optimise energy use and for "assistive" applications. Paul graduated in electronics and was responsible for hardware and software product development and customer services in several product and service start-ups, forming his consulting firm Virtual Technologies in 2000. — Computer Science from the Ground Up As computers become increasingly sophisticated, it is difficult for students of computing science and electronic engineering to gain a broad enough understanding of the technology to fully grasp the underlying principles of some modern devices. In his presentation, Ken takes you back to when computers were much simpler, and proposes that with the help of practical learning by doing, and a bottom up approach, there is a better way of teaching the next generation of engineers. * Ken Boak built his first computer from a kit, aged 17 when he should have been revising for A Levels. Despite mediocre A level grades, Ken got a 1st class degree in electronic engineering in 1986 and went on to work on early experimental HDTV systems at BBC Research Department. In the last 30 years, and 10 subsequent jobs, Ken has encountered much of the fabric of the Digital Revolution - but chosen to ignore 95% of it - and now spends quality time on a narrow boat in Hebden Bridge. *** Sunday :: Workshops *** — Debugging and Troubleshooting Projects with OpenScope MZ Participants learn how to connect a portable multi-function programmable instrumentation module to computer (through WiFi or a USB cable) to acquire, analyze, visualize, and control signals from circuits, sensors, and other electronic devices. Run by: engineers from Digilent — An introductory workshop to NetBSD on embedded platforms An introductory workshop to NetBSD in the context of developing embedded platforms. NetBSD is a fully featured operating system with great agility that has been around for many many years. This workshop is intended to introduce some of the features which are available in the operating system as standard. We'll explore how to go from obtaining the source code to building the operating system, cover features which simplify working with the system, how accessible it is without resorting to installing third party software or writing any C. In this workshop participants will learn how to use the LoRaWAN development shield based on the Microchip RN2483 LoRaWAN module. This comes with a number of basic sensors, while the shield also includes additional Arduino headers so you can add your own sensor shields and devices. Topics we will cover: 1. Cross compilation support with build.sh 2. File tamper detection / execution prevention with Veriexec 3. High-level access to subsystems e.g exploring GPIO via Lua 4. Rapid development with Rumpkernel Participants should bring: * A laptop (Macos, Linux or Windows (windows 10 specifically)) * ARM board (Pi or BeagleBoneBlack and such) * USB->TTL for serial access Run by: Sevan Janiyan — Robot Operating System - a practical intro This will be a practical hands on session getting started with using ROS to get robots to do things. You will learn about what a ROS system is how to ineract with it, and write basic code to work within a ROS system. We will look mostly at mobile robots, and will spend time looking at mapping and autonomous navigation. We will have a few robots and sensors on hand to get practical experience with. You will also learn about using robot simulators with ROS, so that you can carry on experimenting after the workshop even if you don't have access to a robot. You will need to bring a computer to work with. ROS currently runs primarily on Ubuntu. We will have virtual machine images with ROS installed that you can use. No knowledge of ROS is assumed, but some experience using the command line and python would be useful. Run by: Nick Weldin — Open Source Applications for Feature Film Workflows: Demonstrating an entire 4K/HD workflow from the sensor to dailies and Post Production We will firstly be demonstrating the Axiom 4K Open Source camera from Apertusº. The camera has a 4K CMV12000 sensor that is entirely Open which allows us the opportunity to create a camera unencumbered by proprietary restrictions. Recording live 1080p30 video and capturing 4K images as RAW snap12 files we can demonstrate how the RAW imaging can be processed and turned into usable 4K images with correct colour applied for Post. We can process then to Log-C encoded imaging for full information for the Grading processes. Next will be a look at the imaging as it is processed digitally. By using a digital Lab system we can then playback the captured images and produce our final desired deliverable. Run by: Daniel Mulligan — Artificial Intelligence and Machine Learning This workshop will take participants through an ML/AI based embedded application, you will need a Raspberry Pi and something to communicate with it (Laptop etc..).This will provide a lightning hands on intro to using embedded AI. Run by: Alan Wood — Assembling the OSHCamp kit Get help with soldering this year's kit. * Chelsea Back is a trainee engineer and is working towards a degree in Electronic Engineering. She enjoys building microcontroller projects and teaching people how to solder, is a student member of the IET and a STEM Ambassador. NOTE: * There are separate tickets for Saturday and Sunday. * A light lunch and refreshments will be provided each day. * Please aim to arrive between 09:00 and 09:15 on the Saturday as the event will start at 09:20 prompt. -- Andrew Back http://abopen.com

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OSHUG 58 — Getting started with NetBSD on embedded platforms Pt. 2, Thursday 18th May.
by Andrew Back 09 May '17

09 May '17

Hello, Registration is now open for the fifty-eighth meeting, which will provide a hands-on introduction to NetBSD on embedded platforms, picking up where the workshop left off at the previous meeting in April. Cheers, Andrew // Event #58 — Getting started with NetBSD on embedded platforms Pt. 2 On the 18 May 2017, 17:30 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/58 — Workshop scope Following on from the previous workshop, we will be continuing with the theme of NetBSD on embedded platforms. This time covering GPIO access with lua and rapid development with Rump kernel, which we did not get to in the previous workshop due to the lack of time. If you did not get to attend the previous workshop, not to worry, notes are available [1] and assistance will be provided on the day. [1] http://oshug.org/pipermail/oshug/2017-April/000608.html — Participant requirements You will need to bring: * Your own laptop (running Windows, Linux or Mac OS X); * A Raspberry Pi or BeagleBone Black; * An appropriate SD card for your board; * USB card reader to write a new OS image onto said SD card; * An ethernet cable to connect board to laptop and/or a USB UART/FTDI adapter to access the board via the serial console. — Windows 10 users Install Windows Subsystem for Linux. — Windows 10 / Linux (Debian/Ubuntu) users Install the following packages: * build-essential * zlib1g-dev * flex * libc6-dev-i386 — Mac OS X users Install GCC or clang via Xcode or command line tools. — All Everyone should fetch the source code for NetBSD: Download all source archives (.tgz files) from http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD/201704270800Z/source/sets/ . (It is likely the above URL will become invalid as old builds are purged and new ones are generated. Substitute 201704270800Z with the most recent release available on http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD). Any questions should be directed to the discussion list. — Hosted by Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Note: Please aim to arrive by 17:15 as the workshop will start at 17:30 prompt. -- Andrew Back http://abopen.com

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pkgsrcCon 2017 - Call for talk proposals
by Sevan Janiyan 05 May '17

05 May '17

Hi all, Apologies for the software related post. This summer the pkgsrc[1] project is holding its annual developer conference in London at the British Computer Society in association with the Open Source Specialist Group[2] on Saturday the 1st of July and a hack day at the London Hack Space[3] on Sunday the 2nd of July. While the conference is primarily about pkgsrc, it's on the topic of building & packaging open source software in general. I'm currently contacting different communities to raise awareness of the event & to ask folks to submit talks on such topics if they are interested. There will be a formal announcement for attendees soon (it's free & open to all) but in the meantime, if you would like to give a talk on the subject of building or packaging open source software (the more technical the better) please send your submission to sevan(a)NetBSD.org (including a title, abstract and a short bio in the submission (for the website)). For those not familiar with pkgsrc, it's a cross platform packaging system by the NetBSD project, originally forked from FreeBSD ports but with a portability twist added to cover a diverse range of operating systems. It enables you to have such things as the same version of software built with matching set of patches across a wide range of operating systems and to use the same workflow on said operating systems. At OSHUG #55 - "FPGA projects past, planned and possible", the framework I was demonstrating in the "Deploying your FPGA toolchain consistently regardless of your development environment" talk was pkgsrc. Regards, Sevan [1] http://pkgsrc.org [2] http://ossg.bcs.org/ [3] https://london.hackspace.org.uk

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Notes from OSHUG #57
by Sevan Janiyan 24 Apr '17

24 Apr '17

Hello, I've written up the notes from last Thursday's workshop, give it a try if you have a Pi handy. You can use a Pi 3 if you have it hooked up to a HDMI monitor & keyboard. I skipped on the instructions for the BeagleBone Black, email me off list if you'd like to use such a device. Sevan Janiyan These notes cover 1) Cross compilation support (build.sh) 2) Tamper proofing / Tamper detection (Veriexec) *Useful link*: http://man.NetBSD.org - Man pages shipped with the OS available from a web browser http://www.netbsd.org/docs/guide/en/index.html - The NetBSD Guide http://cvsweb.netbsd.org/bsdweb.cgi/src/?only_with_tag=MAIN - Web interface to the OS source code *Cross compilation support as standard* *Requirements*: *Windows 10* Install Windows Subsystem for Linux https://msdn.microsoft.com/en-us/commandline/wsl/about https://msdn.microsoft.com/en-us/commandline/wsl/about Windows 10 / Linux (Debian/Ubuntu) build-essential zlib1g-dev flex libc6-dev-i386 *Mac OS X* GCC or clang via Xcode or command line tools xcode-select --install *Windows 8 & Prior* Install Linux dependencies via Cygwin. TODO: list dependencies *Fetch the sources*: download all source archives (.tgz files) from http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD/201704222230Z/source/sets/ (It is likely this url will become invalid as old builds are purged and new ones are generated. Substitute 201704222230Z with the most recent release available on http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD. *Extract all fetched files*: for file in *.tar.gz do tar -xzf $file done *Change into the extracted source directory*: cd usr/src *List supported architectures and variations we can cross compile for*: ./build.sh list-arch Reduce the listing to the ARM evaluation board archs which devices such as the Pi family are categorised under: ./build.sh list-arch | grep evbarm MACHINE=evbarm MACHINE_ARCH=arm ALIAS=evboarm-el MACHINE=evbarm MACHINE_ARCH=armeb ALIAS=evboarm-eb MACHINE=evbarm MACHINE_ARCH=earm ALIAS=evbearm-el DEFAULT MACHINE=evbarm MACHINE_ARCH=earmeb ALIAS=evbearm-eb MACHINE=evbarm MACHINE_ARCH=earmhf ALIAS=evbearmhf-el MACHINE=evbarm MACHINE_ARCH=earmhfeb ALIAS=evbearmhf-eb MACHINE=evbarm MACHINE_ARCH=earmv4 ALIAS=evbearmv4-el MACHINE=evbarm MACHINE_ARCH=earmv4eb ALIAS=evbearmv4-eb MACHINE=evbarm MACHINE_ARCH=earmv5 ALIAS=evbearmv5-el MACHINE=evbarm MACHINE_ARCH=earmv5eb ALIAS=evbearmv5-eb MACHINE=evbarm MACHINE_ARCH=earmv6 ALIAS=evbearmv6-el MACHINE=evbarm MACHINE_ARCH=earmv6hf ALIAS=evbearmv6hf-el MACHINE=evbarm MACHINE_ARCH=earmv6eb ALIAS=evbearmv6-eb MACHINE=evbarm MACHINE_ARCH=earmv6hfeb ALIAS=evbearmv6hf-eb MACHINE=evbarm MACHINE_ARCH=earmv7 ALIAS=evbearmv7-el MACHINE=evbarm MACHINE_ARCH=earmv7eb ALIAS=evbearmv7-eb MACHINE=evbarm MACHINE_ARCH=earmv7hf ALIAS=evbearmv7hf-el MACHINE=evbarm MACHINE_ARCH=earmv7hfeb ALIAS=evbearmv7hf-eb MACHINE=evbarm64 MACHINE_ARCH=aarch64 ALIAS=evbarm64-el DEFAULT MACHINE=evbarm64 MACHINE_ARCH=aarch64eb ALIAS=evbarm64-eb eb and el indicate the endianness (big or little) hf refers to hardware floating point support. For the Pi, we'll target the ARMv6 with hardware floating point support in little endian mode as the lowest common denominator: evbearmv6hf-el *Build the cross compile toolchain*: To build the tools without requiring elevated privileges (root) the -U flag specifies unprivileged To save us have to specify the MACHINE/MACHINE_ARCH combination which would be done using -m/-a, we specify the ALIAS listed above to -m To speed up the build process we increase the number of parallel jobs the build we execute. This number should match the number of available cores & not exceed it. ./build.sh -U -m evbearmv6hf-el -j2 tools *Build a new kernel for the Pi or Pi2*: ./build.sh -U -m evbearmv6hf-el -j2 kernel=RPI or ./build.sh -U -m evbearmv6hf-el -j2 kernel=RPI2 *To build a complete operating system including images*: **WARNING** Depending on the system it may take a little time ./build.sh -U -m evbearmv6hf-el -j2 release When the build is finished, a report is printed out which contains details of where the generated files are located (this will be relative to your system) & the time it took to build. ===> Summary of results: build.sh command: ./build.sh -U -m evbearmv6hf-el -j2 kernel=RPI build.sh started: Mon Apr 24 17:19:18 BST 2017 NetBSD version: 7.99.70 MACHINE: evbarm MACHINE_ARCH: earmv6hf Build platform: NetBSD 7.99.70 i386 HOST_SH: /bin/sh MAKECONF file: /etc/mk.conf TOOLDIR path: /usr/src/obj/tooldir.NetBSD-7.99.70-i386 DESTDIR path: /usr/src/obj/destdir.evbarm RELEASEDIR path: /usr/src/obj/releasedir Updated makewrapper: /usr/src/obj/tooldir.NetBSD-7.99.70-i386/bin/nbmake-evbearmv6hf-el Building kernel without building new tools Building kernel: RPI Build directory: /usr/src/sys/arch/evbarm/compile/obj/RPI Kernels built from RPI: /usr/src/sys/arch/evbarm/compile/obj/RPI/netbsd build.sh ended: Mon Apr 24 17:27:42 BST 2017 ===> . *Writing Pi image to SD card*: Either you ran build.sh with the release target or you fetched a pre-built image from nycdn.NetBSD.org for your Pi, such as: http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD/201704222230Z/evbarm-earmv6hf… (It is likely this url will become invalid as old builds are purged and new ones are generated. Substitute 201704222230Z with the most recent release available on http://nycdn.netbsd.org/pub/NetBSD-daily/HEAD. *Uncompress image*: gunzip rpi.img.gz Use the flash instructions relevant to the operating system the SD card will be written on http://elinux.org/RPi_Easy_SD_Card_Setup Section 3.3 for Windows Section 3.4 for Mac OS X Section 3.5 for Linux Where the documentation refers to Raspbian images, substitute the NetBSD rpi.img you have. *Preparing to boot*: For the Pi 3, serial console access is not currently available in NetBSD. The system should work with an HDMI display & USB keyboard however. There is nothing further to do for you in this section. For the Pi & Pi 2, connect your USB to TTL adapter to the GND, TXD & RXD pins The location of the pins are the same on the Pi & Pi2, see https://www.raspberrypi.org/documentation/usage/gpio/images/gpio-led.png and https://pinout.xyz You'll need to run a terminal emulator set at 115200 BAUD. Use the cu utility on Linux & OS X. *On Windows*: Use Terraterm http://ttssh2.osdn.jp Set baud rate to 115200 Choose com port associated with your USB adapter. *On Debian & derivatives* (Ubuntu): you need to install the uucp package to obtain the cu utility. The ownership of the device file for the USB adapter need to be changed otherwise you will receive "line in use" error. chown uucp:uucp /dev/ttyUSB0 *On OS X*: Depending on the USB to TTL adapter, the device node in /dev will have a different name Run ls /dev/tty.* to see some of the serial devices detected. Such as /dev/tty.SLAB_USBtoUART or /dev/tty.usbserial-RANDOMCHARACTERS eg /dev/tty.usbserial-AM01Z4V3 *Running cu*: Replace /dev/ttyUSB0 with the device node relevant to your system. sudo cu -l /dev/ttyUSB0 -s 115200 *Exiting cu*: press ~. *Enable serial console on Pi* (not for Pi3): The rpi.img is split into a DOS partition (containing firmware & NetBSD kernel) and NetBSD UFS partition (containing NetBSD operating system). On the DOS partition there is file called cmdline.txt The first line reads root=ld0a console=fb Delete the console=fb so that it reads root=ld0a Save & exit text editor *Booting Pi*: Insert SD card into Pi Apply power Login as root (no password) *Tamper proofing / Tamper detection* (Veriexec) *A device node is needed for veriexec to function, it is currently not created automatically*: cd /dev sh MAKEDEV veriexec *Make a duplicate copy of the ls utility*: cp /bin/ls /bin/ls-2 *Set the veriexec mode to be IDS (Intrusion Detection System) when it runs*: echo veriexec_strict=1 >> /etc/rc.conf *Generate a has of all executables in search patch*: veriexecgen *Verify the hashes on for ls & ls-2 are listed*: grep ls /etc/signatures *Enable veriexec temporarily*: (ignore any errors related to /etc/signatures) /etc/rc.d/veriexec onestart *Confirm you are able to read /bin/ls-2*: cksum -a SHA256 /bin/ls-2 *Clobber /bin/ls-2*: echo 1 > /bin/ls-2 *Try to re-read /bin/ls-2 (it should fail with an error)*: cksum -a SHA256 /bin/ls-2

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Open Source Hardware Camp 2017 (2nd & 3rd Sept) Call for Participation.
by Andrew Back 04 Apr '17

04 Apr '17

Hello, This year Open Source Hardware Camp will take place over the weekend of Saturday 2nd & Sunday 3rd September, hosted as part of the Wuthering Bytes festival in Hebden Bridge, which in 2017 will take place over the course of 10 days (again!) We will be returning to the Birchcliffe Centre in Hebden Bridge, which benefits from the convenience of adjoining, budget accommodation. Proposals for talks and workshops for OSHCamp 2017 are invited! There is no theme and topics may include, for example: * Open source hardware projects * Open development practices and principles * Novel/interesting/fun projects built using open source hardware * Tools (hardware and software) * Skills and techniques, e.g. PCB fab, DIY SMT assembly * Relevant technologies, e.g. SPI/I2C bus programming * ...something else relevant to the community If you would like to give a talk on the Saturday and/or run a workshop on the Sunday please contact me off-list. **** Note that the deadline for submitting titles and abstracts is Monday 1st May. If you would like to discuss ideas etc. please get in touch sooner, rather than later. **** Other events running as part of Wuthering Bytes 2017 and which may be of interest: * Fri 1st: Wuthering Bytes Festival Day * Wed 6th & Thurs 7th: Chip Hack (http://chiphack.org/) * Thurs 7th PM & Fri 8th AM: EDSAC Challenge * Fri 8th AM - Sunday 10th PM: GNU ORConf (http://orconf.org/) Further details on these events to be provided in due course. Cheers, Andrew PS. If you are planning on coming along and thinking of staying at the adjoining hosted, it is worth noting that this can book up quickly. http://www.hebdenbridgehostel.co.uk/ PPS. Super Early Bird tickets for the super organised: https://www.eventbrite.co.uk/e/open-source-hardware-camp-2017-tickets-31845… (pretty sure Eventbrite don't take payment until after the event). -- Andrew Back http://abopen.com

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NetFPGA Developers Summit - Call For Participation
by Neelakandan 29 Mar '17

29 Mar '17

We welcome you to join us at the University of Cambridge on April 20-21, 2017 for the NetFPGA Developers Summit [1]. Held immediately prior to Eurosys 2017, this event is intended to permit participants attend both events with reduced intercontinental travel. The programme includes presentations, live demonstrations, and group discussions on topics that are of an interest to the NetFPGA community. This event will run "un-conference style" in that we brainstorm the actual session schedule on the first morning, with a focus on interactive topics that reflect the interests and exploit the knowledge of the attendees -- but there's also room for traditional talks, etc. There are plenty of break-out rooms for small groups to meet as they see fit. Confirmed topics include: * Running P4 programmes on NetFPGA * Low latency networking * Running network services in hardware * Optical networks * Traffic control tools * More -- See the draft programme on the Wiki [1] See you in Cambridge, The NetFPGA Team http://www.netfpga.org [1] NetFPGA-Developers-Summit-2017 <https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-Developers-Summit-20…>

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Fwd: ORConf 2017 call for participation
by Andrew Back 15 Mar '17

15 Mar '17

The ORCONF 2017 CFP is out! Why not head up to Hebden Bridge and make a week of it, with Open Source Hardware Camp, ORCONF and Chip Hack :o) Details below. Cheers, Andrew -------- Forwarded Message -------- Subject: [Orconf-announce] ORConf 2017 call for participation Date: Wed, 15 Mar 2017 23:03:14 +1100 From: Julius Baxter <julius(a)fossi-foundation.org> To: orconf-announce(a)lists.librecores.org Hi all, ORConf 2017 will be held in Hebden Bridge in the UK from Friday to Sunday, September 8th to the 10th. I'd like to announce that we've opened submissions for presentations, posters and hardware displays at the event. Proposals may be submitted through this form: https://goo.gl/forms/fwALSQvbyUfE83Fh1 ORConf aims to be an event aimed at anyone involved in free and open source computer system design, with an emphasis on open source digital design. So if you contribute to a tool to help put systems together, or develop on and debug them, or publish components and IP, or even make fully-open source chips(!) we'd very much like to hear from you! ORConf this year is being held as part of the esteemed Wuthering Bytes Festival of Technology: http://wutheringbytes.com/ There will be events in Hebden Bridge starting September 1st, so do check it out. We'll be in touch when general registration opens and further details of the event become available, which shouldn't be too far away. All details will be on http://orconf.org as they become available. As always we're looking for sponsorship for this year's event. If you think you'd like to have your company's name associated with it, please email us at orconf(a)fossi-foundation.org <mailto:orconf@fossi-foundation.org> and we'll get talking. Whether or not you're intending on presenting, we're hoping to see everyone again for another year of great presentations and, this time, a few good English ales. Cheers, The ORConf team

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OSHUG 57 — Getting started with NetBSD on embedded platforms, Thursday 20th April.
by Andrew Back 15 Mar '17

15 Mar '17

Hello, Registration is now open for the fifty-seventh meeting, which will be an evening workshop, providing a hands-on introduction to NetBSD on embedded platforms. Cheers, Andrew // OSHUG #57 — Getting started with NetBSD on embedded platforms On the 20 April 2017, 17:30 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/57 — Workshop scope You're hired at the latest startup as a hardware engineer and required to build the firmware which will run on "The Greatest Next Generation Appliance" (GNA). The GNA boots, prints a message and interacts with a device (in this case an LED). In this workshop we cover how a person with an interest and a focus on hardware can make progress with the software side by using the NetBSD operating system and the features it offers to save considerable time and effort. * NetBSD supports a wide & diverse range of systems & CPU architectures. * Support for cross compilation is offered by default and works out of the box. * There is a high level language interface to interact with the system internals. * File integrity verification support to detect tampering of binaries and preventing execution is builtin. * An instance of the kernel can be run as a user process on different operating systems where rapid development can take place. Things we will cover: 1. An introduction to cross-compilation with build.sh and constructing an image to boot on your hardware. 2. Interacting with the system using Lua (which is embedded in the kernel, avoiding having to write C or have knowledge of OS internals) to e.g. access GPIO. 3. Preventing the execution of tampered or unauthorised binaries with veriexec. 4. Using rump kernel for rapid development away from a potentially slow dev board. ** Note: Due to budgeting cuts, "The Greatest Next Generation Appliance" has not yet been purchased, so, the workshop will target the development of the firmware on a Raspberry Pi or BeagleBone Black.** — Participant requirements You will need to bring: * Your own laptop (running Windows, Linux or Mac OS X); * A Raspberry Pi or BeagleBone Black; * An appropriate SD card for your board; * USB card reader to write a new OS image onto said SD card; * An ethernet cable to connect board to laptop and/or a USB UART/FTDI adapter to access the board via the serial console. — Hosted by Sevan Janiyan is founder of Venture 37, which provides system administration & consultancy services. As a fan of operating systems and computers with different CPU architectures, in his spare time he maintains builds of open source software on a variety of systems featuring PowerPC, SPARC and armv7l CPUs. He hopes to own a NeXTcube & OMRON LUNA-88K2 one day. Note: Please aim to arrive by 17:15 as the workshop will start at 17:30 prompt. -- Andrew Back http://abopen.com

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Looking for freelance PCB designer
by Neil Thomson 09 Mar '17

09 Mar '17

Job opportunity for freelance electrical engineer / PCB designer It's The Flash Pac <http://www.itstheflashpack.com/>k are an award winning photo experience agency, specialising in creating fun, interactive photography based experiences at live events. We are known for our innovative approach to briefs, our ability to create striking branded content, and our expertise in delivering amplification of content pre, during, and post event. We are in need of a electrical engineer to spec and design a small PCB for the Raspberry Pi 2, in effect a Raspberry Pi ‘HAT’. The applicant must be able to show recent examples of PCBs designed through to fabrication in Eagle CAD or similar for a commercial client, a thorough understanding of the Raspberry Pi 2 B+ is of benefit. We have a technical requirements document and have sourced some components but consultation is required to fully scope the work, to check that our desired specifications are fully feasible and the components are sufficient to fulfil the requirements. For those interested please email me at (neil(a)itstheflashpack.com) with CV / portfolio. Thanks!

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NetFPGA Design Challenge - Call For Participation
by Neelakandan 04 Mar '17

04 Mar '17

We are pleased to announce the 2017 NetFPGA Design Challenge! NetFPGA platforms are used by the networked systems community for close to a decade. The platforms enable researchers and instructors to build high-speed, hardware-accelerated networking systems. The platforms can be used by researchers to prototype advanced services for next-generation networked systems. By using Field Programmable Gate Arrays (FPGAs), NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. The NetFPGA 2017 contest is a design challenge. The design teams are to produce a working implementation employing any HW and SW design methodology and targeting the NetFPGA SUME platform. The deadline for submissions is April 13th, 2017. The winners will be announced at the NetFPGA Developers Summit (Thursday 20th - Friday, 21st April, 2017 Cambridge, UK). Challenge: Lowest Latency Switch Low latency devices are being increasingly used across a large number of applications. Low latency solutions are few, and are rarely open source. The goal of this challenge is to provide a usable, high performance, open source alternative to use by universities and organizations who need the flexibility of open source. The systems will be evaluated using OSNT, an Open Source Network Tester. Test benches will be available online, for users to experiment and independently evaluate their design. The competition is open to students of all levels (undergraduate and postgraduate), as well as to non students. There is no need to own a NetFPGA SUME platform to take part in the competition although, clearly, development and testing will be made easier if you have access to this platform. Team Prizes: First place: 500GBP Best students project: 500GBP The winning projects and runner ups will be invited to present their work at the NetFPGA Developers Summit 2017. All challenge participants are keenly encouraged to attend the NetFPGA Developers Summit and are entitled to a reduced registration rate. The design challenge prizes are generously supported by IMC http://www.imc.nl/ More details can be found at: http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017 Good luck! The NetFPGA Team http://www.netfpga.org

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Cirrus Logic Voyager CL-PS7000 documentation
by Sevan / Venture37 13 Feb '17

13 Feb '17

Hello, There is a software emulator for the Apple Newton PDA called Einstein, the developers are looking for documentation for a legacy chipset manufactured by Cirrus Logic to improve the emulator. Would any of you happen to have a copy of the Cirrus Logic Voyager CL-PS7000 Apple Newton PCA Chip Set Engineering Specification? http://www.warthman.com/projects-cirrus-logic-voyager-architectural-overvie… https://twitter.com/stevenf/status/831176567627804672 Apologies for the talk of legacy closed hardware but it is about open source software if that makes it any better :) https://github.com/pguyot/Einstein Sevan

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OSHUG 56 — An introduction to software-defined radio with LimeSDR (workshop), Fri 24th March.
by Andrew Back 12 Feb '17

12 Feb '17

Hello, Registration is now open for the fifty-sixth meeting, which will be a one day workshop, providing a hands-on introduction to software-defined radio with the LimeSDR. This will cover key concepts and LMS7002M FPRF IC architecture, and include simple digital radio examples along with a demonstrations of advanced systems, such as 4G femtocell. // OSHUG #56 — An introduction to software-defined radio with LimeSDR On the 24 March 2017, 09:00 - 17:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: https://events.bcs.org/book/2451/ A Software-Defined Radio (SDR) is a highly reconfigurable radio that can be used for many different radio applications through simply changing the software that links with it. An example of such a reconfigurable radio is the LimeSDR, which can both transmit and receive data and voice, using just about any wireless system. The LimeSDR was launched by Lime Microsystems in May 2016 via a crowdfunding campaign, and is now shipping to over 3,500 customers worldwide. It is based on the Lime Microsystems LMS7002M Field Programmable RF (FPRF) 2x2 MIMO transceiver, which continuously covers frequencies from 100kHz to 3.8GHz. The LMS7002M has been successfully used in a wide range of digital radio applications, including 2G/4G Femtocell base stations, GNSS, DAB, DVBT receivers and RF test and measurement equipment. The LimeSDR also includes an FPGA and USB 3.0 to provide host connectivity. — Workshop scope The heart of the day is to provide a practical ‘hands-on’ afternoon session using the LimeSDR with the Lime Suite GUI and FFT Viewer. Then to use GNU Octave and Pothos to make some very simple digital radio examples. To facilitate this, the morning will include introductory talks explaining the purpose of the various analogue and digital blocks included in the LMS7002M. It will also include tutorial material covering the key concepts required to understand modern digital radio transceivers, and how to use them, as well as practical issues associated with radio reception. In addition the day will feature some advanced demonstrations showing the full capabilities of the LimeSDR and its LMS7002M transceiver, including 4G Femtocell, as well as educational examples such as a simple OFDM transceiver data link. — Participant requirements ** Participants are required to bring a laptop computer with USB 3.0 ** Minimum computer hardware requirements are USB 3.0 capability and 2GB RAM. Although no prior knowledge of radio is required, an awareness of basic terminology will be very helpful. Basic computer programming and administration skills will also be helpful. The software that will be used must be installed prior to the event. For details see: https://wiki.myriadrf.org/LimeSDR_Workshop — What is provided * LimeSDR hardware will be provided for use during the workshop * A light lunch will be provided and please ensure that any dietary requirements are made clear during registration — Hosted by The workshop will be led by Dr. Danny Webster, who has over 25 years of experience in the field of RF design covering varied applications from military radio to cellular infrastructure. Danny Graduated from Swansea University in 1988 and was awarded a PhD from University College London in 1995. From 1995 he worked as a Research Fellow at University College London and was a consultant to companies such as Nokia, Roke Manor Research and Agilent in Santa Rosa. From 2001 he was with Hipertech and joined Lime Micro in 2005 as Principle Design Engineer (RF) working on Field programmable RF ICs. Danny is a senior member of the IEEE. This workshop is free to attend and hosted by Lime Microsystems in partnership with the BCS Open Source Specialist Group and the Open Source Hardware User Group. Note: Please aim to arrive by 08:45 as the workshop will start at 09:00 prompt. -- Andrew Back http://abopen.com

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OSHUG 55 — FPGA projects past, planned and possible, Thursday 16th February.
by Andrew Back 05 Feb '17

05 Feb '17

Hello, Registration is now open for the February meeting, details of which can be found below. We also still have space for 1 or 2 more short talks of 10-15 minutes, so if you have an idea for a talk, get in touch! Cheers, Andrew // Event #55 — FPGA projects past, planned and possible On the 16 February 2017, 18:00 - 20:00 at BCS London, 1st Floor, The Davidson Building, 5 Southampton Street, London, WC2E 7HA. Registration: http://oshug.org/event/55 The fifty-fifth meeting will feature a series of shorter talks that explore past, planned and possible projects which use FPGAs. — FPGA Projects - What would I build and why would I want to PLAs have been interesting ever since the 70s when digital logic often became complex, consuming unnecessary space and power. Back then the cost of PLA deployment was high and it has continued to be high until recently. Now that we have powerful, low cost development platforms and relatively cheap FPGAs the cost equation has shifted radically. * Paul Tanner is a consultant, developer and maker in wood, metal, plastic, electronics and software. His day job is IT-based business improvement for SMEs. By night he turns energy nut, creating tools to optimise energy use. Paul graduated in electronics and was responsible for hardware and software product development and customer services in several product and service start-ups, switching to consulting in 2000. — Using FPGAs to solve realtime problems Microcontrollers a great platform to solve basic control problems in electronics, with simple motor drivers and sensors readily avaiable and easy to integrate. However, when the motor control becomes more complex with BLDC and FOC things get much more tricky. When you have to use multiple BLDC motors and more complex sensors with image processing the poor microcontroller quickly becomes to swamped to provide control in realtime. This is where adding FPGA technology makes a great deal of sense particularly in mutli-discipline projects like robotics where many sensors, motors and image processing will need to be managed and controlled concurrently. A robotics platform must therefore contain both concurrent hardware resources, algorithmic control through soft or hard cores along with communication protocols. * Alan Wood has been working with parallel distributed programming for several decades. His recent work includes smart grids, 3D printers, robotics, automation and biotec diagnostics. His current research is focused on machine learning, inference and image processing for embedded applications using FPGA and multi-cores. He is a long term advocate and moderator (aka Folknology) for xCORE and other opensource communities, as well as a founder of Surrey and Hampshire Makerspace and myStorm FPGA development boards. — FPGAs in the Cloud? It is no secret that FPGA based computing machines are great at dealing with certain types of workloads that conventional CPU based machines can not efficiently handle. These machines, alongside their GPU and even custom ASIC based brethren, have been filling up racks in large data centres all over the globe helping speed up systems that have components of machine learning, complex analytics and even video processing. This short talk will have a look at the state of FPGAs in the datacenter and discuss the recent developments around the availability of FPGA equipped computing nodes in commodity cloud providers. * Omer Kilic is an Embedded Systems Engineer who enjoys working with small connected computers of all shapes and sizes. He works at the various intersections of hardware and software engineering practices, product development and manufacturing. — Chip Hack 2017 & EDSAC Challenge This talk will introduce and issue a call for participation for two events that are being hosted as part of the Wuthering Bytes technology festival, that will take place in Hebden Bridge in September, in the week following Open Source Hardware Camp 2017. Chip Hack is a two day hands-on workshop that provides a gentle introduction to programming FPGAs and is aimed at novices with no prior experience of Hardware Description Languages (HDLs) or FPGAs. This will be followed immediately by a challenge event, during which a small team of experts will work to extend a basic functional FPGA model of EDSAC — the pioneering computer designed and constructed at Cambridge University, and which was operational by 1949. * Dr Jeremy Bennett is founder and Chief Executive of Embecosm, a consultancy implementing open source compilers and chip simulators for major corporations around the world. He is a author of the standard textbook "Introduction to Compiling Techniques" (McGraw-Hill 1990, 1995, 2003). Contact him at: jeremy.bennett(a)embecosm.com. Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt. // -- Andrew Back http://abopen.com

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Fwd: 2017 NetFPGA open source design challenge
by Alex Bradbury 01 Feb '17

01 Feb '17

The NetFPGA project are running an open source design challenge, that might be of interest to some people on this list. For more info, see http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017/ Best, Alex ---------- Forwarded message ---------- We are pleased to announce the 2017 NetFPGA Design Challenge! NetFPGA platforms are used by the networked systems community for close to a decade. The platforms enable researchers and instructors to build high-speed, hardware-accelerated networking systems. The platforms can be used by researchers to prototype advanced services for next-generation networked systems. By using Field Programmable Gate Arrays (FPGAs), NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. The NetFPGA 2017 contest is a design challenge. The design teams are to produce a working implementation employing any HW and SW design methodology and targeting the NetFPGA SUME platform. The deadline for submissions is April 13th, 2017. The winners will be announced at the NetFPGA Developers Summit (Thursday 20th - Friday, 21st April, 2017 Cambridge, UK). Challenge: Lowest Latency Switch Low latency devices are being increasingly used across a large number of applications. Low latency solutions are few, and are rarely open source. The goal of this challenge is to provide a usable, high performance, open source alternative to use by universities and organizations who need the flexibility of open source. The systems will be evaluated using OSNT, an Open Source Network Tester. Test benches will be available online, for users to experiment and independently evaluate their design. The competition is open to students of all levels (undergraduate and postgraduate), as well as to non students. There is no need to own a NetFPGA SUME platform to take part in the competition although, clearly, development and testing will be made easier if you have access to this platform. Team Prizes: First place: £500 Best students project: £500 The winning projects and runner ups will be invited to present their work at the NetFPGA Developers Summit 2017. All challenge participants are keenly encouraged to attend the NetFPGA Developers Summit and are entitled to a reduced registration rate. The design challenge prizes are generously supported by IMC http://www.imc.nl/ More details can be found at: http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017 Good luck! The NetFPGA Team http://www.netfpga.org

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