Hello,
Registration is now open for the May meeting, details of which can be
found below.
A reminder also that in addition to the monthly meeting, we're hosting
a one day conference in partnership with NMI and BCS in just over one
week, on 10th May:
http://oshug.org/event/nmiopen
Cheers,
Andrew
//
Event #49 — Open Source Chips Pt. 3
On the 19 May 2016, 18:00 - 20:00 at BCS London, 1st Floor, The
Davidson Building, 5 Southampton Street, London, WC2E 7HA.
Registration: http://oshug.org/event/49
At the forty-ninth meeting we will return to the topic of open source
chip design, with talks on AAP — an open hardware processor
architecture — and its simulation, the Free and Open Source Silicon
Foundation (FOSSi), and getting into FPGAs.
— AAP: An Altruistic Processor
An Altruistic Processor (AAP) is an open hardware 16-bit architecture
for deeply embedded applications running on small FPGA devices. It is
somewhat configurable, with a minimum of 4 16-bit general registers,
at least one word-addressed code space of up to 16Mword and at least
one byte addressed data space of up to 64kbyte.
The primary role of AAP is as a test bench for compiler backends. It
encapsulates features found in a wide range of popular embedded
processors which traditionally cause difficulties for compiler
writers.
In this talk we will discuss the motivation behind this project, our
experience implementing and testing LLVM for this architecture, the
architectural features unique to our processor and how these interact
with LLVM. In AAP integers are less than 32-bits, pointers may be word
addressed, and too large to fit in a registers (of which there may be
very few), and have multiple function and code spaces that may be
switched between at run time, each with their own addressing
requirements.
Edward Jones Edward Jones supports Embecosm's work on runtime
libraries, LLVM toolchains and testing. Currently his work involves
developing LLVM compiler support for embedded systems, as well as work
on the TSERO project to develop tools which intelligently optimise
compiled code. Other research topics include superoptimization, the
art of finding the provably optimal instruction sequence for a given
task.
— AAPSim: Simulating Hardware in LLVM
An Altruistic Processor (AAP) is an open hardware 16-bit architecture
for deeply embedded applications running on small FPGA devices. It is
somewhat configurable, with a minimum of 4 16-bit general registers,
at least one word-addressed code space of up to 16Mword and at least
one byte addressed data space of up to 64kbyte.
A key part of any implementation of an embedded toolchain is a
simulator of the architecture, both such that user written code can be
run and so the compiler's implementation itself can be verified. As
part of AAP, we have implemented a simulator based on LLVM MC that
both runs standalone and as part of a gdb/lldbserver.
This talk explores the design and experiences of using LLVM as the
host for a simulator.
Simon Cook has a background in low-power processors, with a particular
focus on the energy constraints of code running in embedded
environments. Since 2012, he has been working on LLVM for deeply
embedded architectures, primarily focusing on optimization, but also
on providing compiler support for unique hardware features. Most
recently, he has been working on LLVM for AAP, a reference Harvard
architecture with the aim of improving upstream support for more
eccentric architectural features.
— Open Source Silicon Design Ecosystem
The talk will begin by surveying the current state of the open source
chip design space and present some of the most exciting and
interesting projects and communities which are contributing to the
field. Next, the Free and Open Source Silicon Foundation (FOSSi) will
be introduced as a group to help further the cause through LibreCores,
amongst other initiatives.
Julius Baxter has been involved in the OpenRISC project since 2008.
Now working as a digital design engineer in Cambridge, he helps run
the annual OpenRISC conference, ORCONF, which has since become a
general open source digital design conference, and is one of the
founders of FOSSi.
— Getting into FPGAs; Why, what, how & where might this lead
Why? Probably the biggest question I get with programmable logic and
gate arrays is: why would I need to use an FPGA, when I can do so much
with commonly available micro-controllers? In other words when doesn't
a low cost Von Neumann chip do the job efficiently.
What? A lightning tour of low cost FPGAs and their capabilities,
classic applications and use cases that don't involve spending
$millions on fabricating silicon chips.
How? The field of FPGAs and chip design can appear big and scary at
first. It can present a challenging environment to any newcomer and
requires acquisition of multiple new disciplines and commercial tools.
As a result many are put of by the steep learning curve and investment
of proprietary tools and hardware. Icestorm is Clifford Wolf's an
opensource project which combines tools like Yosys to provide a simple
and open tool set supporting multiple vendors of FPGAs. Although it is
at an early stage and only a small range of products are supported its
a great tool to get started with on small projects and enables you to
get close to the mechanicals. In addition to it's Verilog support, it
also exposes some nice low level features that will result in more
innovative and diverse open tools flourishing around it further down
the road.
Where? A glimpse at the part FPGAs might play in the emerging embedded
intelligence market: Matrixed Open Turing Engines (Motes) enabling low
powered smart controllers for robotics, devices and IoT. This
illustrates at least one fascinating trajectory for FPGAS & ASICs in
the opensource hardware community.
Alan Wood has been working with parallel distributed programming for
several decades. His recent work includes smart grids, 3D printers,
robotics, automation and biotec diagnostics. His current research is
focused on machine learning for embedded applications using Motes on
FPGA and emerging Asics. He is a long term advocate and moderator (aka
Folknology) for xCORE and other opensource communities, as well as a
founder of Surrey and Hampshire Makerspace.
Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt.
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